| 2009 | ||
|---|---|---|
| 26 | Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri: Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation. ADMA 2009: 253-264 | |
| 25 | Tomonari Masada, Atsuhiro Takasu, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri: Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining. APWeb/WAIM 2009: 556-561 | |
| 24 | Tomoya Ishimori, Hideki Yamada, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yuri Nishikawa, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Kiyoshi Oguri: Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. ARC 2009: 368-373 | |
| 23 | Tomonari Masada, Tsuyoshi Hamada, Yuichiro Shibata, Kiyoshi Oguri: Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices. IEA/AIE 2009: 491-500 | |
| 2008 | ||
| 22 | Hidenori Matsubayashi, Shinsuke Nino, Toru Aramaki, Yuichiro Shibata, Kiyoshi Oguri: Retrieving 3-d information with FPGA-based stream processing. FPGA 2008: 261 | |
| 21 | Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell: An optimization method of DMA transfer for a general purpose reconfigurable machine. FPL 2008: 647-650 | |
| 2007 | ||
| 20 | Sayaka Shida, Yuichiro Shibata, Kiyoshi Oguri, Duncan A. Buell: Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine. FPL 2007: 589-592 | |
| 19 | Hideki Yamada, Naoki Iwanaga, Yuichiro Shibata, Yasunori Osana, Masato Yoshimi, Yow Iwaoka, Yuri Nishikawa, Toshinori Kojima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri: A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. FPL 2007: 808-811 | |
| 18 | Miwa Miyata, Yuichiro Shibata, Kiyoshi Oguri: An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor. Systems and Computers in Japan 38(14): 20-28 (2007) | |
| 2006 | ||
| 17 | Miwa Miyata, Hideyuki Tsuchiya, Yuichiro Shibata, Kiyoshi Oguri: An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor. FPL 2006: 1-4 | |
| 2005 | ||
| 16 | Taichi Nagamoto, Satoshi Yano, Mitsuru Uchida, Yuichiro Shibata, Kiyoshi Oguri: New Area Management Method Based on "Pressure" for Plastic Cell Architecture. EUC 2005: 418-427 | |
| 15 | Shinya Kyusaka, Hayato Higuchi, Taichi Nagamoto, Yuichiro Shibata, Kiyoshi Oguri: Evaluation of Space Allocation Circuits. EUC 2005: 428-437 | |
| 14 | Naoki Iwanaga, Yuichiro Shibata, Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Tomonori Fukushima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri: Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA. FPL 2005: 666-669 | |
| 2004 | ||
| 13 | Takehiro Ito, Yuichiro Shibata, Kiyoshi Oguri: Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA. FPL 2004: 911-916 | |
| 2003 | ||
| 12 | Kiyoshi Oguri, Yuichiro Shibata, Akira Nagoya: Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. Asia-Pacific Computer Systems Architecture Conference 2003: 54-68 | |
| 2001 | ||
| 11 | Ryusuke Konishi, Hideyuki Ito, Hiroshi Nakada, Akira Nagoya, Norbert Imlig, Tsunemichi Shiozawa, Minoru Inamori, Kouichi Nagami, Kiyoshi Oguri: PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. ASYNC 2001: 54- | |
| 10 | Hiroshi Nakada, Hideyuki Ito, Ryusuke Konishi, Akira Nagoya, Kiyoshi Oguri, Tsunemichi Shiozawa, Norbert Imlig: Self-reorganising systems on VLSI circuits. ISCAS (4) 2001: 310-313 | |
| 2000 | ||
| 9 | Norbert Imlig, Ryusuke Konishi, Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Minoru Inamori, Hiroshi Nakada: Communicating logic: an alternative embedded stream processing paradigm. ASP-DAC 2000: 317-322 | |
| 8 | Tsunemichi Shiozawa, Norbert Imlig, Kouichi Nagami, Kiyoshi Oguri, Akira Nagoya, Hiroshi Nakada: An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture. FPL 2000: 805-809 | |
| 1999 | ||
| 7 | Hiroshi Nakada, Kiyoshi Oguri, Norbert Imlig, Minoru Inamori, Ryusuke Konishi, Hideyuki Ito, Kouichi Nagami, Tsunemichi Shiozawa: Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer. IPPS/SPDP Workshops 1999: 679-687 | |
| 1998 | ||
| 6 | Kouichi Nagami, Kiyoshi Oguri, Tsunemichi Shiozawa, Hideyuki Ito, Ryusuke Konishi: Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose. FCCM 1998: 68-77 | |
| 5 | Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Ryusuke Konishi, Norbert Imlig: A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture. FPL 1998: 426-430 | |
| 4 | Kiyoshi Oguri, Norbert Imlig, Hideyuki Ito, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa: General-Purpose Computer Architecture Based on Fully Programmable Logic. ICES 1998: 323-334 | |
| 3 | Hideyuki Ito, Kiyoshi Oguri, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa: The Plastic Cell Architecture for Dynamic Reconfigurable Computing. International Workshop on Rapid System Prototyping 1998: 39-44 | |
| 2 | Hiroyuki Yamashita, Toshihiko Suguri, Shingo Kinoshita, Yasushi Okada, Kiyoshi Oguri: Message routing latency-minimizing method in an ASIC design for distributed cooperative communication protocol processing. Systems and Computers in Japan 29(3): 39-58 (1998) | |
| 1990 | ||
| 1 | Akira Nagoya, Yukihiro Nakamura, Kiyoshi Oguri, Ryo Nomura: Multi-Level Optimization for Large Scale ASICS. ICCAD 1990: 564-567 | |