| 2001 | ||
|---|---|---|
| 2 | Makoto Nagata, Takafumi Ohmoto, Jin Nagai, Takashi Morie, Atsushi Iwata: Test circuits for substrate noise evaluation in CMOS digital ICs. ASP-DAC 2001: 13-14 | |
| 1 | Yoshitaka Murasaka, Makoto Nagata, Takafumi Ohmoto, Takashi Morie, Atsushi Iwata: Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation. ISQED 2001: 482-487 | |
| 1 | Atsushi Iwata | [1] [2] |
| 2 | Takashi Morie | [1] [2] |
| 3 | Yoshitaka Murasaka | [1] |
| 4 | Jin Nagai | [2] |
| 5 | Makoto Nagata | [1] [2] |