Vassilis Paliouras

	2009
32		Theodoros Giannopoulos, Vassilis Paliouras: A Low-Complexity PTS-based PAPR Reduction Technique for OFDM Signals without Transmission of Side Information. Signal Processing Systems 56(2-3): 141-153 (2009)
	2008
31		Ioannis Kouretas, Charalambos Basetas, Vassilis Paliouras: Low-power logarithmic number system addition/subtraction and their impact on digital filters. ISCAS 2008: 692-695
30		Ioannis Kouretas, Vassilis Paliouras: Mixed Radix-2 and High-Radix RNS Bases for Low-Power Multiplication. PATMOS 2008: 93-102
29		Nikos Kanistras, Vassilis Paliouras: Impact of roundoff error on the decisions of the Log Sum-Product algorithm for LDPC decoding. SiPS 2008: 100-105
	2007
28		Charalambos Basetas, Ioannis Kouretas, Vassilis Paliouras: Low-Power Digital Filtering Based on the Logarithmic Number System. PATMOS 2007: 546-555
27		Dimitris Gkrimpas, Vassilis Paliouras: On The Complexity of Joint Demodulation and Convolutional Decoding. SiPS 2007: 669-674
	2006
26		Theodoros Giannopoulos, Vassilis Paliouras: A novel technique for low-power D/A conversion based on PAPR reduction. ISCAS 2006
25		Theodoros Giannopoulos, Vassilis Paliouras: Low-Power Maximum Magnitude Computation for PAPR Reduction in OFDM Transmitters. PATMOS 2006: 203-213
24		Konstantina Karagianni, Vassilis Paliouras, Theodoros Giannopoulos: Low-Power Saturated Arithmetic and its Application in VLSI Architectures for OFDM Modems. SiPS 2006: 200-204
23		Spyros Gidaros, Vassilis Paliouras: Simplified Criteria for Early Iterative Decoding Termination. SiPS 2006: 209-214
22		Theodoros Giannopoulos, Vassilis Paliouras: A Low-Complexity PTS-based PAPR Reduction Technique for OFDM Signals without Transmission of Side Information. SiPS 2006: 434-439
21		Johan Vounckx, Vassilis Paliouras: Editorial. J. Low Power Electronics 2(1): (2006)
	2005
20		Vassilis Paliouras, Johan Vounckx, Diederik Verkest: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings Springer 2005
19		Panagiotis D. Vouzis, Mark G. Arnold, Vassilis Paliouras: Using CLNS for FFTs in OFDM demodulation of UWB receivers. ISCAS (4) 2005: 3954-3957
18		Theodoros Giannopoulos, Vassilis Paliouras: Low-Power VLSI Architectures for OFDM Transmitters Based on PAPR Reduction. PATMOS 2005: 177-186
17		Konstantina Karagianni, Vassilis Paliouras: Low-Power Aspects of Nonlinear Signal Processing. PATMOS 2005: 518-527
	2004
16		Enrico Macii, Odysseas G. Koufopavlou, Vassilis Paliouras: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings Springer 2004
15		Theodoros Giannopoulos, Vassilis Paliouras: An efficient architecture for peak-to-average power ratio reduction in OFDM systems in the presence of pulse-shaping filtering. ISCAS (4) 2004: 85-88
14		Stamatis Krommydas, Vassilis Paliouras: An efficient memory compression scheme for 8 k FFT in a DVB-T receiver and the corresponding error model. ISCAS (4) 2004: 89-92
13		Panagiotis D. Vouzis, Vassilis Paliouras: Optimal Logarithmic Representation in Terms of SNR Behavior. PATMOS 2004: 760-769
	2003
12		Eleni Fotopoulou, Vassilis Paliouras, Thanos Stouraitis: A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems. ISCAS (2) 2003: 125-128
11		Ioannis Kouretas, Vassilis Paliouras: High-radix redundant circuits for RNS modulo rn-1, rn, or rn+1. ISCAS (5) 2003: 229-232
	2002
10		Vassilis Paliouras, Alexander Skavantzos, Thanos Stouraitis: Multi-voltage low power convolvers using the polynomial residue number system. ACM Great Lakes Symposium on VLSI 2002: 7-11
	2001
9		Vassilis Paliouras, Thanos Stouraitis: Low-Power Properties of the Logarithmic Number System. IEEE Symposium on Computer Arithmetic 2001: 229-236
8		Vassilis Paliouras, Thanos Stouraitis: Signal activity and power consumption reduction using the logarithmic number system. ISCAS (2) 2001: 653-656
7		Konstantina Karagianni, Vassilis Paliouras, George Diamantakos, Thanos Stouraitis: Operation-Saving VLSI Architectures for 3D Geometrical Transformations. IEEE Trans. Computers 50(6): 609-622 (2001)
	2000
6		Vassilis Paliouras, Thanos Stouraitis: Logarithmic Number System for Low-Power Arithmetic. PATMOS 2000: 285-294
	1999
5		Vassilis Paliouras, Thanos Stouraitis: Novel high-radix residue number system multipliers and adders. ISCAS (1) 1999: 451-454
	1997
4		Vassilis Paliouras, Thanos Stouraitis: Area-time performance of VLSI FIR filter architectures based on residue arithmetic. EUROMICRO 1997: 576-583
	1995
3		I. Orginos, Vassilis Paliouras, Thanos Stouraitis: A Novel Algorithm for Multi-Operand Logarithmic Number System Addition and Subtraction Using Polynominal Approximation. ISCAS 1995: 1992-1995
	1994
2		Vassilis Paliouras, Thanos Stouraitis: Systematic Design of Multi-Modulus/Multi-Function Residue Number System Processors. ISCAS 1994: 79-82
	1993
1		Vassilis Paliouras, Dimitrios Soudris, Thanos Stouraitis: Methodology for the Design of Signed-digit DSP Processors. ISCAS 1993: 1833-1836

Coauthor Index

1	Mark G. Arnold	[19]
2	Charalambos Basetas	[28] [31]
3	George Diamantakos	[7]
4	Eleni Fotopoulou	[12]
5	Theodoros Giannopoulos	[15] [18] [22] [24] [25] [26] [32]
6	Spyros Gidaros	[23]
7	Dimitris Gkrimpas	[27]
8	Nikos Kanistras	[29]
9	Konstantina Karagianni	[7] [17] [24]
10	Odysseas G. Koufopavlou	[16]
11	Ioannis Kouretas	[11] [28] [30] [31]
12	Stamatis Krommydas	[14]
13	Enrico Macii	[16]
14	I. Orginos	[3]
15	Alexander Skavantzos	[10]
16	Dimitrios Soudris (D. J. Soudris)	[1]
17	Thanos Stouraitis	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12]
18	Diederik Verkest	[20]
19	Johan Vounckx	[20] [21]
20	Panagiotis D. Vouzis	[13] [19]

Colors in the list of coauthors