 | 2010 |
|---|
| 79 |       | Farhana Aleen,
Monirul Sharif,
Santosh Pande:
Input-driven dynamic execution prediction of streaming applications.
PPOPP 2010: 315-324 |
| 2009 |
|---|
| 78 | | Zhiyuan Li,
Santosh Pande:
Editorial: Languages, compilers, and tools for embedded systems.
ACM Trans. Embedded Comput. Syst. 8(4): (2009) |
| 77 | | Fernando Alegre,
Eric Feron,
Santosh Pande:
Using Ellipsoidal Domains to Analyze Control Systems Software
CoRR abs/0909.1977: (2009) |
| 2008 |
|---|
| 76 | | Tushar Kumar,
Romain Cledat,
Jaswanth Sreeram,
Santosh Pande:
Statistically Analyzing Execution Variance for Soft Real-Time Applications.
LCPC 2008: 124-140 |
| 2007 |
|---|
| 75 |  | Santosh Pande,
Zhiyuan Li:
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007
ACM 2007 |
| 74 | | Tushar Kumar,
Jaswanth Sreeram,
Romain Cledat,
Santosh Pande:
A profile-driven statistical analysis framework for the design optimization of soft real-time applications.
ESEC/SIGSOFT FSE 2007: 529-532 |
| 73 | | Tushar Kumar,
Jaswanth Sreeram,
Romain Cledat,
Santosh Pande:
A profile-driven statistical analysis framework for the design optimization of soft real-time applications.
ESEC/SIGSOFT FSE (Companion) 2007: 529-532 |
| 72 | | Jaswanth Sreeram,
Romain Cledat,
Tushar Kumar,
Santosh Pande:
RSTM : A Relaxed Consistency Software Transactional Memory for Multicores.
PACT 2007: 428 |
| 71 | | Xiaotong Zhuang,
Santosh Pande:
Power-efficient prefetching for embedded processors.
ACM Trans. Embedded Comput. Syst. 6(1): (2007) |
| 70 | | Xiaotong Zhuang,
Santosh Pande:
Allocating architected registers through differential encoding.
ACM Trans. Program. Lang. Syst. 29(2): (2007) |
| 2006 |
|---|
| 69 | | Tao Zhang,
Xiaotong Zhuang,
Santosh Pande:
Compiler Optimizations to Reduce Security Overhead.
CGO 2006: 346-357 |
| 68 | | Xiaotong Zhuang,
Santosh Pande:
A Scalable Priority Queue Architecture for High Speed Network Processing.
INFOCOM 2006 |
| 67 | | R. Collins,
Fernando Alegre,
Xiaotong Zhuang,
Santosh Pande:
Compiler assisted dynamic management of registers for network processors.
IPDPS 2006 |
| 66 | | Kun Zhang,
Santosh Pande:
Minimizing downtime in seamless migrations of mobile applications.
LCTES 2006: 12-21 |
| 65 | | Xiaotong Zhuang,
Santosh Pande:
Effective thread management on network processors with compiler analysis.
LCTES 2006: 72-82 |
| 64 | | Xiaotong Zhuang,
Tao Zhang,
Santosh Pande:
Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection.
MICRO 2006: 113-122 |
| 63 | | Kun Zhang,
Tao Zhang,
Santosh Pande:
Memory Protection through Dynamic Access Control.
MICRO 2006: 123-134 |
| 62 | | Xiaotong Zhuang,
Santosh Pande:
Parallelizing load/stores on dual-bank memory embedded processors.
ACM Trans. Embedded Comput. Syst. 5(3): 613-657 (2006) |
| 2005 |
|---|
| 61 | | Christian Poellabauer,
Tao Zhang,
Santosh Pande,
Karsten Schwan:
An Efficient Frequency Scaling Approach for Energy-Aware Embedded Real-Time Systems.
ARCS 2005: 207-221 |
| 60 | | Tao Zhang,
Xiaotong Zhuang,
Santosh Pande,
Wenke Lee:
Anomalous path detection with hardware support.
CASES 2005: 43-54 |
| 59 | | Tao Zhang,
Xiaotong Zhuang,
Santosh Pande:
Building Intrusion-Tolerant Secure Software.
CGO 2005: 255-266 |
| 58 | | Kun Zhang,
Santosh Pande:
Efficient application migration under compiler guidance.
LCTES 2005: 10-20 |
| 57 | | Xiaotong Zhuang,
Santosh Pande:
Differential register allocation.
PLDI 2005: 168-179 |
| 56 | | Kalyan S. Perumalla,
Richard M. Fujimoto,
Prashant J. Thakare,
Santosh Pande,
Homa Karimabadi,
Yuri Omelchenko,
Jonathan Driscoll:
Performance prediction of large-scale parallel discrete event models of physical systems.
Winter Simulation Conference 2005: 356-364 |
| 2004 |
|---|
| 55 | | Xiaotong Zhuang,
Tao Zhang,
Santosh Pande:
HIDE: an infrastructure for efficiently protecting information leakage on the address bus.
ASPLOS 2004: 72-84 |
| 54 | | Weidong Shi,
Tao Zhang,
Santosh Pande:
Static Techniques to Improve Power Efficiency of Branch Predictors.
Asia-Pacific Computer Systems Architecture Conference 2004: 385-398 |
| 53 | | Xiaotong Zhuang,
Tao Zhang,
Hsien-Hsin S. Lee,
Santosh Pande:
Hardware assisted control flow obfuscation for embedded processors.
CASES 2004: 292-302 |
| 52 | | Kun Zhang,
Tao Zhang,
Santosh Pande:
Binary translation to improve energy efficiency through post-pass register re-allocation.
EMSOFT 2004: 74-85 |
| 51 | | Tao Zhang,
Weidong Shi,
Santosh Pande:
Static Techniques to Improve Power Efficiency of Branch Predictors.
HiPC 2004: 274-285 |
| 50 | | Tankut Akgul,
Vincent John Mooney III,
Santosh Pande:
A Fast Assembly Level Reverse Execution Method via Dynamic Slicing.
ICSE 2004: 522-531 |
| 49 | | Xiaotong Zhuang,
Tao Zhang,
Santosh Pande:
Hardware-managed register allocation for embedded processors.
LCTES 2004: 192-201 |
| 48 | | Xiaotong Zhuang,
Santosh Pande:
Power-efficient prefetching via bit-differential offset assignment on embedded processors.
LCTES 2004: 67-77 |
| 47 | | Xiaotong Zhuang,
Santosh Pande:
Balancing register allocation across threads for a multithreaded network processor.
PLDI 2004: 289-300 |
| 46 | | Sathyanarayanan Thammanur,
Santosh Pande:
A fast, memory-efficient register allocation framework for embedded systems.
ACM Trans. Program. Lang. Syst. 26(6): 938-974 (2004) |
| 2003 |
|---|
| 45 | | Mark Leair,
Santosh Pande:
Optimizing Dynamic Dispatches through Type Invariant Region Analysis.
HiPC 2003: 459-468 |
| 44 | | Xiaotong Zhuang,
Santosh Pande:
Compiler Scheduling of Mobile Agents for Minimizing Overheads.
ICDCS 2003: 600- |
| 43 | | Dong Zhou,
Santosh Pande,
Karsten Schwan:
Method Partitioning - Runtime Customization of Pervasive Programs without Design-time Application Knowledge.
ICDCS 2003: 610-619 |
| 42 | | Xiaotong Zhuang,
Santosh Pande:
Resolving Register Bank Conflicts for a Network Processor.
IEEE PACT 2003: 269- |
| 41 | | Tao Zhang,
Santosh Pande,
Antonio Valverde Garcia:
Tamper-resistant whole program partitioning.
LCTES 2003: 209-219 |
| 40 | | Xiaotong Zhuang,
ChokSheak Lau,
Santosh Pande:
Storage assignment optimizations through variable coalescence for embedded processors.
LCTES 2003: 220-231 |
| 39 | | Fabrice Rastello,
Amit Rao,
Santosh Pande:
Optimal task scheduling at run time to exploit intra-tile parallelism.
Parallel Computing 29(2): 209-239 (2003) |
| 2002 |
|---|
| 38 | | Tao Zhang,
Santosh Pande,
André L. M. dos Santos,
Franz Josef Bruecklmayr:
Leakage-proof program partitioning.
CASES 2002: 136-145 |
| 37 | | Siddharth Rele,
Santosh Pande,
Soner Önder,
Rajiv Gupta:
Optimizing Static Power Dissipation by Functional Units in Superscalar Processors.
CC 2002: 261-275 |
| 36 | | Xiaotong Zhuang,
Santosh Pande,
John S. Greenland Jr.:
A Framework for Parallelizing Load/Stores on Embedded Processors.
IEEE PACT 2002: 68- |
| 35 | | Abhishek Singh,
Santosh Pande:
Compiler optimizations for Java aglets in distributed data intensive applications.
SAC 2002: 87-92 |
| 34 | | Waibhav Tembe,
Santosh Pande:
Loop Restructuring for Data I/O Minimization on Limited On-Chip Memory Embedded Processors.
IEEE Trans. Computers 51(10): 1269-1280 (2002) |
| 33 | | Narasimhan Ramasubramanian,
Ram Subramanian,
Santosh Pande:
Automatic Compilation of Loops to Exploit Operator Parallelism on Configurable Arithmetic Logic Units.
IEEE Trans. Parallel Distrib. Syst. 13(1): 45-66 (2002) |
| 2001 |
|---|
| 32 | | Santosh Pande,
Dharma P. Agrawal:
Compiler Optimizations for Scalable Parallel Systems Languages, Compilation Techniques, and Run Time Systems
Springer 2001 |
| 31 | | Santosh Pande,
Tareq Bali:
A Compilation Method for Communication-Efficient Partitioning of DOALL Loops.
Compiler Optimizations for Scalable Parallel Systems Languages 2001: 413-444 |
| 30 | | Ram Subramanian,
Santosh Pande:
A Data Re-use Based Compiler Optimization for FPGAs.
FPL 2001: 648-652 |
| 29 | | Siddharth Rele,
Vipin Jain,
Santosh Pande,
J. Ramanujam:
Compact and efficient code generation through program restructuringon limited memory embedded DSPs.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(4): 477-494 (2001) |
| 2000 |
|---|
| 28 | | Lei Wang,
Waibhav Tembe,
Santosh Pande:
A Framework for Loop Distribution on Limited On-Chip Memory Processors.
CC 2000: 141-156 |
| 27 | | Srivatsan Narasimhan,
Santosh Pande:
Compiler Based Scheduling of Java Mobile Agents.
LCPC 2000: 372-376 |
| 26 | | Deepankar Bairagi,
Santosh Pande,
Dharma P. Agrawal:
A Framework for Efficient Register Allocation through Selective Register Demotion.
LCR 2000: 57-69 |
| 25 | | Deepankar Bairagi,
Santosh Pande,
Dharma P. Agrawal:
A Framework for Enhancing Code Quality in Limited Register Set Embedded Processors.
LCTES 2000: 81-95 |
| 1999 |
|---|
| 24 | | Ram Subramanian,
Santosh Pande:
Efficient Program Partitioning Based on Compiler Controlled Communication.
IPPS/SPDP Workshops 1999: 4-18 |
| 23 | | Vipin Jain,
Siddharth Rele,
Santosh Pande,
J. Ramanujam:
Code Restructuring for Improving Real Time Response through Code Speed, Size Trade-offs on Limited Memory Embedded DSPs.
LCPC 1999: 459-463 |
| 22 | | Lei Wang,
Santosh Pande:
Data I/O Minimization for Loops on Limited Onchip Memory Processors.
LCPC 1999: 472-476 |
| 21 | | Amit Rao,
Santosh Pande:
Storage Assignment Optimizations to Generate Compact and Efficient Code on Embedded DSPs.
PLDI 1999: 128-138 |
| 20 | | Santosh Pande,
Tareq Bali:
A Computation+Communication Load Balanced Loop Partitioning Method for Distributed Memory Systems.
J. Parallel Distrib. Comput. 58(3): 515-545 (1999) |
| 19 | | Rajiv Gupta,
Santosh Pande,
Kleanthis Psarris,
Vivek Sarkar:
Compilation techniques for parallel systems.
Parallel Computing 25(13-14): 1741-1783 (1999) |
| 1998 |
|---|
| 18 | | Fabrice Rastello,
Amit Rao,
Santosh Pande:
Optimal Task Scheduling to Minimize Inter-Tile Latencies.
ICPP 1998: 172-179 |
| 17 | | Sundaram Anantharaman,
Santosh Pande:
Compiler Optimizations for Real Time Execution of Loops on Limited Memory Embedded Systems.
IEEE Real-Time Systems Symposium 1998: 154- |
| 16 | | Narasimhan Ramasubramanian,
Ram Subramanian,
Santosh Pande:
Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems.
LCPC 1998: 305-322 |
| 15 | | Sundaram Anantharaman,
Santosh Pande:
An Efficient Data Partitioning Method for Limited Memory Embedded Systems.
LCTES 1998: 108-222 |
| 14 | | Sekhar Darbha,
Santosh Pande:
A Robust Compile Time Method for Scheduling Task Parallelism on Distributed Memory Machines.
The Journal of Supercomputing 12(4): 325-347 (1998) |
| 1996 |
|---|
| 13 | | Santosh Pande,
Tareq Bali:
A Multi-Phase Partitioner and Scheduler for Distributed Memory Systems.
HICSS (1) 1996: 547-556 |
| 12 | | Santosh Pande:
A Compile Time Partitioning Method for DOALL Loops on Distributed Memory Systems.
ICPP, Vol. 3 1996: 35-44 |
| 11 | | Santosh Pande,
Kleanthis Psarris:
Program Repartitioning on Varying Communication Cost Parallel Architectures.
J. Parallel Distrib. Comput. 33(2): 205-213 (1996) |
| 10 | | Santosh Pande,
Dharma P. Agrawal:
Special Issue on Compilation Techniques for Distributed Memory Systems: Guest Editors' Introduction.
J. Parallel Distrib. Comput. 38(2): 107-113 (1996) |
| 1995 |
|---|
| 9 | | Kleanthis Psarris,
Santosh Pande:
Classical dependence analysis techniques: sufficiently accurate in practice.
HICSS (2) 1995: 123-132 |
| 8 | | Santosh Pande,
Dharma P. Agrawal:
Run-time issues in program partitioning on distributed memory systems.
Concurrency - Practice and Experience 7(5): 429-454 (1995) |
| 7 | | Santosh Pande,
Dharma P. Agrawal,
Jon Mauney:
A Scalable Scheduling Scheme for Functional Parallelism on Distributed Memory Multiprocessor Systems.
IEEE Trans. Parallel Distrib. Syst. 6(4): 388-399 (1995) |
| 1994 |
|---|
| 6 | | Santosh Pande,
Kleanthis Psarris:
Compiling Functional Parallelism on a Family of Different Distributed Memory Architectures.
ICPP (1) 1994: 182-186 |
| 5 | | Kleanthis Psarris,
Santosh Pande:
An Empirical Study of the I Test for Exact Data Dependence.
ICPP (3) 1994: 92-96 |
| 4 | | Santosh Pande,
Kleanthis Psarris:
A Compilation Technique for Varying Communication Cost NUMA Architectures.
PARLE 1994: 49-60 |
| 3 | | Santosh Pande,
Dharma P. Agrawal,
Jon Mauney:
A Threshold Scheduling Strategy for Sisal on Distributed Memory Machines.
J. Parallel Distrib. Comput. 21(2): 223-236 (1994) |
| 1991 |
|---|
| 2 | | Sukil Kim,
Santosh Pande,
Dharma P. Agrawal,
Jon Mauney:
A Message Segmentation Technique to Minimize Task Completion Time.
IPPS 1991: 519-524 |
| 1990 |
|---|
| 1 | | Santosh Pande,
Dharma P. Agrawal,
Jon Mauney:
On Control Flow and Pseudo-Static Dynamic Allocation Strategy.
ICPP (2) 1990: 300-301 |
