Davide Pandini

	2009
27		Patrice Joubert Doriol, Yamarita Villavicencio, Cristiano Forzan, Mario Rotigni, Giovanni Graziosi, Davide Pandini: EMC-aware design on a microcontroller for automotive applications. DATE 2009: 1208-1213
26		Cristiano Forzan, Davide Pandini: Statistical static timing analysis: A survey. Integration 42(3): 409-435 (2009)
	2007
25		Nikolaos Andrikos, Luciano Lavagno, Davide Pandini, Christos P. Sotiriou: A Fully-Automated Desynchronization Flow for Synchronous Circuits. DAC 2007: 982-985
24		Cristiano Forzan, Davide Pandini: Why we need statistical static timing analysis. ICCD 2007: 91-96
23		Davide Pandini: Innovative Design Platforms for Reliable SoCs in Advanced Nanometer Technologies. IOLTS 2007: 254
22		Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide Pandini, Donatella Sciuto: A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis. ISVLSI 2007: 92-97
21		Davide Pandini, Guido A. Repetto, Vincenzo Sinisi: Clock Distribution Techniques for Low-EMI Design. PATMOS 2007: 201-210
20		Davide Pandini: Statistical Static Timing Analysis: A New Approach to Deal with Increased Process Variability in Advanced Nanometer Technologies. PATMOS 2007: 577
19		Davide Pandini, Giuseppe Desoli, Alessandro Cremonesi: Computing and design for software and silicon manufacturing. VLSI-SoC 2007: 122-127
18		Cristiano Forzan, Davide Pandini: Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis CoRR abs/0710.4639: (2007)
	2006
17		L. Necchi, Luciano Lavagno, Davide Pandini, Laura Vanzago: An ultra-low energy asynchronous processor for Wireless Sensor Networks. ASYNC 2006: 78-85
16		Davide Pandini, Guido A. Repetto: Spectral Analysis of the On-Chip Waveforms to Generate Guidelines for EMC-Aware Design. PATMOS 2006: 532-542
15		Cristiano Forzan, Davide Pandini, Mariagrazia Graziano: Power Supply Selective Mapping for Accurate Timing Analysis. J. Low Power Electronics 2(1): 105-112 (2006)
	2005
14		Cristiano Forzan, Davide Pandini: A complete methodology for an accurate static noise analysis. ACM Great Lakes Symposium on VLSI 2005: 302-307
13		Cristiano Forzan, Davide Pandini: Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis. DATE 2005: 982-983
12		Mariagrazia Graziano, Cristiano Forzan, Davide Pandini: Power Supply Selective Mapping for Accurate Timing Analysis. PATMOS 2005: 267-276
	2004
11		Luca Macchiarulo, Consolato F. Caccamo, Davide Pandini: A comparison between mask- and field-programmable routing structures on industrial FPGA architectures. ACM Great Lakes Symposium on VLSI 2004: 436-439
10		Davide Pandini, Cristiano Forzan, Livio Baldi: Design Methodologies and Architecture Solutions for High-Performance Interconnects. ICCD 2004: 152-159
	2003
9		Davide Pandini, Lawrence T. Pileggi, Andrzej J. Strojwas: Bounding the efforts on congestion optimization for physical synthesis. ACM Great Lakes Symposium on VLSI 2003: 7-10
8		Davide Pandini, Lawrence T. Pileggi, Andrzej J. Strojwas: Global and local congestion optimization in technology mapping. IEEE Trans. on CAD of Integrated Circuits and Systems 22(4): 498-505 (2003)
	2002
7		Davide Pandini, Lawrence T. Pileggi, Andrzej J. Strojwas: Congestion-Aware Logic Synthesis. DATE 2002: 664-671
6		Davide Pandini, Lawrence T. Pileggi, Andrzej J. Strojwas: Understanding and addressing the impact of wiring congestion during technology mapping. ISPD 2002: 131-136
	2000
5		Bruno Franzini, Cristiano Forzan, Davide Pandini, Primo Scandolara, Alessandro Dal Fabbro: Crosstalk Aware Static Timing Analysis: A Two Step Approach. ISQED 2000: 499-504
	1998
4		Davide Pandini, Primo Scandolara, Carlo Guardiani: Reduced Order Macromodel of Coupled Interconnects for Timing and Functional Verification of Sub Half-micron IC Designs. ASP-DAC 1998: 45-50
	1995
3		Enrico Malavasi, Davide Pandini: Optimum CMOS stack generation with analog constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 14(1): 107-122 (1995)
	1994
2		Edoardo Charbon, Enrico Malavasi, Davide Pandini, Alberto L. Sangiovanni-Vincentelli: Simultaneous Placement and Module Optimization of Analog IC's. DAC 1994: 31-35
	1993
1		Valentino Liberali, Enrico Malavasi, Davide Pandini: Automatic Generation of Transistor Stacks for CMOS Analog Layout. ISCAS 1993: 2098-2102

Coauthor Index

1	Nikolaos Andrikos	[25]
2	Livio Baldi	[10]
3	Consolato F. Caccamo	[11]
4	Edoardo Charbon	[2]
5	Alessandro Cremonesi	[19]
6	Giuseppe Desoli	[19]
7	Patrice Joubert Doriol	[27]
8	Alessandro Dal Fabbro	[5]
9	Fabrizio Ferrandi	[22]
10	Cristiano Forzan	[5] [10] [12] [13] [14] [15] [18] [24] [26] [27]
11	Bruno Franzini	[5]
12	Mariagrazia Graziano (M. Graziano)	[12] [15]
13	Giovanni Graziosi	[27]
14	Carlo Guardiani	[4]
15	Luciano Lavagno	[17] [25]
16	Valentino Liberali	[1]
17	Luca Macchiarulo	[11]
18	Enrico Malavasi	[1] [2] [3]
19	L. Necchi	[17]
20	Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage)	[6] [7] [8] [9]
21	Guido A. Repetto	[16] [21]
22	Angelo P. E. Rosiello	[22]
23	Mario Rotigni	[27]
24	Alberto L. Sangiovanni-Vincentelli	[2]
25	Primo Scandolara	[4] [5]
26	Donatella Sciuto	[22]
27	Vincenzo Sinisi	[21]
28	Christos P. Sotiriou	[25]
29	Andrzej J. Strojwas	[6] [7] [8] [9]
30	Laura Vanzago	[17]
31	Yamarita Villavicencio	[27]

Colors in the list of coauthors