 | 2008 |
| 12 |  | Silvia Muceli,
Danilo Pani,
Luigi Raffo:
Non-Invasive Real-Time Fetal ECG Extraction - A Block-on-Line DSP Implementation based on the JADE Algorithm.
BIOSIGNALS (2) 2008: 458-463 |
| 11 |  | Simone Secchi,
Francesca Palumbo,
Danilo Pani,
Luigi Raffo:
A Network on Chip Architecture for Heterogeneous Traffic Support with Non-Exclusive Dual-Mode Switching.
DSD 2008: 141-148 |
| 10 |  | Gianmarco Angius,
Danilo Pani,
Luigi Raffo,
Stefano Seruis,
Paolo Randaccio:
A DVB-T Based System for the Diffusion of Tele-Home Care Practice.
HEALTHINF (2) 2008: 31-36 |
| 9 |  | Francesca Palumbo,
Simone Secchi,
Danilo Pani,
Luigi Raffo:
A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs.
SAMOS 2008: 96-105 |
| 2007 |
| 8 |  | Giovanni Busonera,
Stefano Carucci,
Danilo Pani,
Luigi Raffo:
Self-Organization on Silicon: System Integration of a Fixed-Point Swarm Coprocessor.
NICSO 2007: 149-158 |
| 7 |  | Francesca Palumbo,
Danilo Pani,
Luigi Raffo,
Simone Secchi:
A Surface Tension and Coalescence Model for Dynamic Distributed Resources Allocation in Massively Parallel Processors on-Chip.
NICSO 2007: 335-345 |
| 2006 |
| 6 |  | Gianmarco Angius,
Cristian Manca,
Danilo Pani,
Luigi Raffo:
Cooperative VLSI Tiled Architectures: Stigmergy in a Swarm Coprocessor.
ANTS Workshop 2006: 396-403 |
| 5 |  | Danilo Pani,
Luigi Raffo:
Stigmergic approaches applied to flexible fault-tolerant digital VLSI architectures.
J. Parallel Distrib. Comput. 66(8): 1014-1024 (2006) |
| 4 |  | Salvatore Carta,
Danilo Pani,
Luigi Raffo:
Reconfigurable Coprocessor for Multimedia Application Domain.
VLSI Signal Processing 44(1-2): 135-152 (2006) |
| 2005 |
| 3 |  | Danilo Pani,
Giuseppe Passino,
Luigi Raffo:
Run-time Adaptive Resources Allocation and Balancing on Nanoprocessors Arrays.
DSD 2005: 492-499 |
| 2004 |
| 2 |  | Danilo Pani,
Luigi Raffo:
A VLSI Multiplication-and-Add Scheme Based on Swarm Intelligence Approaches.
ANTS Workshop 2004: 13-24 |
| 1 |  | Danilo Pani,
Luigi Raffo:
A Swarm Intelligence Based VLSI Multiplication-and-Add Scheme.
PPSN 2004: 362-371 |