Ioannis Papaefstathiou

	2009
37		Grigorios Chrysos, Ioannis Papaefstathiou: Heavily Reducing WSNs' Energy Consumption by Employing Hardware-Based Compression. ADHOC-NOW 2009: 312-326
36		Panagiotis Afratis, Constantinos Galanakis, Euripides Sotiriades, Georgios-Grigorios Mplemenos, Grigorios Chrysos, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos: Design and implementation of a database filter for BLAST acceleration. DATE 2009: 166-171
35		Michalis Vavouras, Kyprianos Papadimitriou, Ioannis Papaefstathiou: Implementation of a genetic algorithm on a virtex-ii pro FPGA. FPGA 2009: 287
	2008
34		Konstantinos Papadopoulos, Ioannis Papaefstathiou: Titan-R: A Reconfigurable Hardware Implementation of a High-Speed Compressor. FCCM 2008: 216-225
33		Georgios-Grigorios Mplemenos, Ioannis Papaefstathiou: MPLEM: An 80-processor FPGA Based Multiprocessor System. FCCM 2008: 273-274
32		Antonis Nikitakis, Ioannis Papaefstathiou: A Memory-Efficient FPGA-based Classification Engine. FCCM 2008: 53-62
31		Antonis Nikitakis, Ioannis Papaefstathiou: A Multi Gigabit FPGA-Based 5-tuple Classification System. ICC 2008: 2081-2085
30		Dimitrios Simos, Ioannis Papaefstathiou, Manolis Katevenis: Building an FoC Using Large, Buffered Crossbar Cores. IEEE Design & Test of Computers 25(6): 538-548 (2008)
	2007
29		Ioannis Papaefstathiou, George Kornaros, Nikolaos Chrysos: A buffered crossbar-based chip interconnection framework supporting quality of service. ACM Great Lakes Symposium on VLSI 2007: 90-95
28		Ioannis Mavroidis, Ioannis Papaefstathiou: Efficient testbench code synthesis for a hardware emulator system. DATE 2007: 888-893
27		Ioannis Mavroidis, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos: A Fast FPGA-Based 2-Opt Solver for Small-Scale Euclidean Traveling Salesman Problem. FCCM 2007: 13-22
26		Vassilis Dimopoulos, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos: A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems. ICSAMOS 2007: 186-193
25		Ioannis Mavroidis, Ioannis Papaefstathiou, Dionisios N. Pnevmatikatos: Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem. IEEE International Workshop on Rapid System Prototyping 2007: 41-47
24		Ioannis Papaefstathiou, Vassilis Papaefstathiou: Memory-Efficient 5D Packet Classification At 40 Gbps. INFOCOM 2007: 1370-1378
23		Theofanis Orphanoudakis, George Kornaros, Ioannis Mavroidis, Aristides Nikologiannis, Ioannis Papaefstathiou: An Embedded Networking SoC for purely Ethernet MANs/WANs. ISCC 2007: 901-906
22		Ioannis Papaefstathiou, Theofanis Orphanoudakis, George Kornaros, Christopher Kachris, Ioannis Mavroidis, Aristides Nikologiannis: Queue Management in Network Processors CoRR abs/0710.4813: (2007)
21		Kyriakos Vlachos, Theofanis Orphanoudakis, Ioannis Papaefstathiou, Nikos A. Nikolaou, Dionisios N. Pnevmatikatos, George E. Konstantoulakis, Jorge-A. Sanchez-P.: Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units. Microprocessors and Microsystems 31(3): 188-199 (2007)
	2006
20		Vassilis Papaefstathiou, Ioannis Papaefstathiou: A hardware-engine for layer-2 classification in low-storage, ultra-high bandwidth environments. DATE Designers' Forum 2006: 112-117
	2005
19		Aristides Efthymiou, Jim D. Garside, Ioannis Papaefstathiou: A Low-Power Processor Architecture Optimized forWireless Devices. ASAP 2005: 185-190
18		Ioannis Papaefstathiou, Theofanis Orphanoudakis, George Kornaros, Christopher Kachris, Ioannis Mavroidis, Aristides Nikologiannis: Queue Management in Network Processors. DATE 2005: 112-117
17		Vassilis Papaefstathiou, Ioannis Papaefstathiou: A Memory Efficient, 100 Gb/sec MAC Classification Engine. LCN 2005: 470-471
	2004
16		Ioannis Papaefstathiou, George Kornaros, Nicholaos Zervos: Software Processing Performance in Network Processors. DATE 2004: 186-191
15		Ioannis Papaefstathiou: Titan II: An IPcomp Processor for 10-Gbps Networks. IEEE Design & Test of Computers 21(6): 514-523 (2004)
14		Ioannis Papaefstathiou, Stylianos Perissakis, Theofanis Orphanoudakis, Nikos A. Nikolaou, George Kornaros, Nicholas Zervos, George E. Konstantoulakis, Dionisios N. Pnevmatikatos, Kyriakos Vlachos: PRO3: A Hybrid NPU Architecture. IEEE Micro 24(5): 20-33 (2004)
13		Ioannis Papaefstathiou, Nikos A. Nikolaou, Bharat T. Doshi, Eric Grosse: Guest Editors' Introduction: Network Processors for Future High-End Systems and Applications. IEEE Micro 24(5): 7-9 (2004)
12		Ioannis Papaefstathiou: Low Level Hardware Compression for Multi-gigabit Networks. Journal of Circuits, Systems, and Computers 13(6): 1307-1320 (2004)
11		Ioannis Papaefstathiou, Vassilis Papaefstathiou, C. Sotiriou: Design-space exploration of the most widely used cryptography algorithms. Microprocessors and Microsystems 28(10): 561-571 (2004)
10		Aristides Nikologiannis, Ioannis Papaefstathiou, George Kornaros, Christopher Kachris: An FPGA-based queue management system for high speed networking devices. Microprocessors and Microsystems 28(5-6): 223-236 (2004)
	2003
9		George Kornaros, Theofanis Orphanoudakis, Ioannis Papaefstathiou: GFS: An Efficient Implementation of Fair Scheduling for Mult-Gigabit Packet Networks. ASAP 2003: 389-399
8		George Kornaros, Ioannis Papaefstathiou, Aristides Nikologiannis, Nicholaos Zervos: A fully-programmable memory management system optimizing queue handling at multi-gigabit rates. DAC 2003: 54-59
7		George Kornaros, Ioannis Papaefstathiou: An Innovative Resource Management Scheme for Multi-gigabit Networking Systems. HSNMC 2003: 165-175
6		Ioannis Papaefstathiou, Helen-Catherine Leligou, Theofanis Orphanoudakis, George Kornaros, Nicholaos Zervos, George E. Konstantoulakis: An innovative scheduling scheme for high-speed network processors. ISCAS (2) 2003: 93-96
5		George Kornaros, Theofanis Orphanoudakis, Ioannis Papaefstathiou: Active flow identifiers for scalable, QoS scheduling in 10-Gbps network processors. ISCAS (2) 2003: 97-100
4		Ioannis Papaefstathiou: Titan II : An IPComp Processor for 10Gbit/sec networks. ISVLSI 2003: 234-235
	2000
3		Ioannis Papaefstathiou: Measurement Based Connection Admission Control Algorithm for ATM Networks that Use Low Level Compression. IS&N 2000: 49-60
	1999
2		Ioannis Papaefstathiou: Compressing ATM Streams On-Line. Data Compression Conference 1999: 543
1		Ioannis Papaefstathiou: Accelerating ATM: on-line compression of ATM streams. IPCCC 1999: 233-239

Coauthor Index

1	Panagiotis Afratis	[36]
2	Grigorios Chrysos	[36] [37]
3	Nikolaos Chrysos	[29]
4	Vassilis Dimopoulos	[26]
5	Bharat T. Doshi	[13]
6	Aristides Efthymiou	[19]
7	Constantinos Galanakis	[36]
8	Jim D. Garside	[19]
9	Eric Grosse	[13]
10	Christoforos Kachris (Christopher Kachris)	[10] [18] [22]
11	Manolis Katevenis	[30]
12	George E. Konstantoulakis	[6] [14] [21]
13	George Kornaros	[5] [6] [7] [8] [9] [10] [14] [16] [18] [22] [23] [29]
14	Helen-Catherine Leligou	[6]
15	Ioannis Mavroidis	[18] [22] [23] [25] [27] [28]
16	Georgios-Grigorios Mplemenos	[33] [36]
17	Antonis Nikitakis	[31] [32]
18	Nikos A. Nikolaou	[13] [14] [21]
19	Aristides Nikologiannis	[8] [10] [18] [22] [23]
20	Theofanis Orphanoudakis	[5] [6] [9] [14] [18] [21] [22] [23]
21	Kyprianos Papademetriou (Kyprianos Papadimitriou)	[35]
22	Konstantinos Papadopoulos	[34]
23	Vassilis Papaefstathiou	[11] [17] [20] [24]
24	Stylianos Perissakis	[14]
25	Dionisios N. Pnevmatikatos	[14] [21] [25] [26] [27] [36]
26	Jorge-A. Sanchez-P.	[21]
27	Dimitrios Simos	[30]
28	Euripides Sotiriades	[36]
29	C. Sotiriou	[11]
30	Michalis Vavouras	[35]
31	Kyriakos Vlachos	[14] [21]
32	Nicholaos Zervos (Nicholas Zervos)	[6] [8] [14] [16]

Colors in the list of coauthors