| 2009 | ||
|---|---|---|
| 65 | Jörg Henkel, Sri Parameswaran: Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009 ACM 2009 | |
| 64 | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic: HitME: low power Hit MEmory buffer for embedded systems. ASP-DAC 2009: 335-340 | |
| 63 | Xin He, Jorgen Peddersen, Sri Parameswaran: LOP: a novel SRAM-based architecture for low power and high throughput packet classification. CODES+ISSS 2009: 137-146 | |
| 62 | Mohammad Shihabul Haque, Andhi Janapsatya, Sri Parameswaran: SuSeSim: a fast simulation strategy to find optimal L1 cache configuration for embedded systems. CODES+ISSS 2009: 295-304 | |
| 61 | Haris Javaid, Sri Parameswaran: A design flow for application specific heterogeneous pipelined multiprocessor systems. DAC 2009: 250-253 | |
| 60 | Krutartha Patel, Sri Parameswaran, Roshan G. Ragel: CUFFS: An instruction count based architectural framework for security of MPSoCs. DATE 2009: 779-784 | |
| 59 | Yee Jern Chong, Sri Parameswaran: Flexible multi-mode embedded floating-point unit for field programmable gate arrays. FPGA 2009: 171-180 | |
| 58 | Jörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Roshan G. Ragel: Security and Dependability of Embedded Systems: A Computer Architects' Perspective. VLSI Design 2009: 30-32 | |
| 57 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) | |
| 2008 | ||
| 56 | Jeremy Chan, Sri Parameswaran: NoCOUT : NoC topology generation with mixed packet-switched and point-to-point networks. ASP-DAC 2008: 265-270 | |
| 55 | Haris Javaid, Sri Parameswaran: Synthesis of heterogeneous pipelined multiprocessor systems using ILP: jpeg case study. CODES+ISSS 2008: 1-6 | |
| 54 | Krutartha Patel, Sri Parameswaran: LOCS: a low overhead profiler-driven design flow for security of MPSoCs. CODES+ISSS 2008: 79-84 | |
| 53 | Yee Jern Chong, Sri Parameswaran: Rapid application specific floating-point unit generation with bit-alignment. DAC 2008: 62-67 | |
| 52 | Krutartha Patel, Sri Parameswaran: SHIELD: a software hardware design methodology for security and reliability of MPSoCs. DAC 2008: 858-861 | |
| 51 | Karin Avnit, Vijay D'Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran: A Formal Approach To The Protocol Converter Problem. DATE 2008: 294-299 | |
| 50 | Jude Angelo Ambrose, Sri Parameswaran, Aleksandar Ignjatovic: MUTE-AES: a multiprocessor architecture to prevent power analysis based side channel attack of the AES algorithm. ICCAD 2008: 678-684 | |
| 49 | Jude Angelo Ambrose, Naeill Aldon, Aleksandar Ignjatovic, Sri Parameswaran: Anatomy of Differential Power Analysis for AES. SYNASC 2008: 459-466 | |
| 48 | Jorgen Peddersen, Sri Parameswaran: Low-Impact Processor for Dynamic Runtime Power Management. IEEE Design & Test of Computers 25(1): 52-62 (2008) | |
| 47 | Seng Lin Shee, Andrea Erdos, Sri Parameswaran: Architectural Exploration of Heterogeneous Multiprocessor Systems for JPEG. International Journal of Parallel Programming 36(1): 140-162 (2008) | |
| 46 | Jorgen Peddersen, Sri Parameswaran: Energy Driven Application Self-Adaptation at Run-time. JCP 3(3): 14-24 (2008) | |
| 2007 | ||
| 45 | Jorgen Peddersen, Sri Parameswaran: CLIPPER: Counter-based Low Impact Processor Power Estimation at Run-time. ASP-DAC 2007: 890-895 | |
| 44 | Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran: A smart random code injection to mask power analysis based side channel attacks. CODES+ISSS 2007: 51-56 | |
| 43 | Jude Angelo Ambrose, Roshan G. Ragel, Sri Parameswaran: RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks. DAC 2007: 489-492 | |
| 42 | Seng Lin Shee, Sri Parameswaran: Design Methodology for Pipelined Heterogeneous Multiprocessor System. DAC 2007: 811-816 | |
| 41 | Yee Jern Chong, Sri Parameswaran: Automatic application specific floating-point unit generation. DATE 2007: 461-466 | |
| 40 | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jörg Henkel: Instruction trace compression for rapid instruction cache simulation. DATE 2007: 803-808 | |
| 39 | Jorgen Peddersen, Sri Parameswaran: Energy Driven Application SelfAdaptation. VLSI Design 2007: 385-390 | |
| 2006 | ||
| 38 | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran: A novel instruction scratchpad memory optimization method based on concomitance metric. ASP-DAC 2006: 612-617 | |
| 37 | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran: Finding optimal L1 cache configuration for embedded systems. ASP-DAC 2006: 796-801 | |
| 36 | Roshan G. Ragel, Sri Parameswaran: Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability. CODES+ISSS 2006: 100-105 | |
| 35 | Seng Lin Shee, Andrea Erdos, Sri Parameswaran: Heterogeneous multiprocessor implementations for JPEG: : a case study. CODES+ISSS 2006: 217-222 | |
| 34 | Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran, Aleksandar Ignjatovic: Application specific forwarding network and instruction encoding for multi-pipe ASIPs. CODES+ISSS 2006: 241-246 | |
| 33 | Roshan G. Ragel, Sri Parameswaran: IMPRES: integrated monitoring for processor reliability and security. DAC 2006: 502-505 | |
| 32 | Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran: Customization of application specific heterogeneous multi-pipeline processors. DATE 2006: 746-751 | |
| 31 | Ivan Siu-Chuang Lu, Neil Weste, Sri Parameswaran: ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-Ends: A Power and Performance Perspective. VLSI Design 2006: 575-580 | |
| 30 | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran: Exploiting statistical information for implementation of instruction scratchpad memory in embedded system. IEEE Trans. VLSI Syst. 14(8): 816-829 (2006) | |
| 2005 | ||
| 29 | Newton Cheung, Sri Parameswaran, Jörg Henkel: Battery-aware instruction generation for embedded processors. ASP-DAC 2005: 553-556 | |
| 28 | Roshan G. Ragel, Sri Parameswaran, Sayed Mohammad Kia: Micro embedded monitoring for security in application specific instruction-set processors. CASES 2005: 304-314 | |
| 27 | Seng Lin Shee, Sri Parameswaran, Newton Cheung: Novel architecture for loop acceleration: a case study. CODES+ISSS 2005: 297-302 | |
| 26 | Jeremy Chan, Sri Parameswaran: NoCEE: energy macro-model extraction methodology for network on chip routers. ICCAD 2005: 254-259 | |
| 25 | Hui Guo, Sri Parameswaran: Balancing System Level Pipelines with Stage Voltage Scaling. ISVLSI 2005: 287-289 | |
| 24 | Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya, Sri Parameswaran: Rapid Embedded Hardware/Software System Generation. VLSI Design 2005: 111-116 | |
| 23 | Sri Parameswaran, Jörg Henkel: Instruction code mapping for performance increase and energy reduction in embedded computer systems. IEEE Trans. VLSI Syst. 13(4): 498-502 (2005) | |
| 2004 | ||
| 22 | Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswaran: Dual-pipeline heterogeneous ASIP design. CODES+ISSS 2004: 12-17 | |
| 21 | Newton Cheung, Sri Parameswaran, Jörg Henkel, Jeremy Chan: MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor. DATE 2004: 1020-1027 | |
| 20 | Newton Cheung, Sri Parameswaran, Jörg Henkel: A quantitative study and estimation models for extensible instructions in embedded processors. ICCAD 2004: 183-189 | |
| 19 | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic: Hardware/software managed scratchpad memory for embedded system. ICCAD 2004: 370-377 | |
| 18 | Jeremy Chan, Sri Parameswaran: NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture. VLSI Design 2004: 717-720 | |
| 2003 | ||
| 17 | Newton Cheung, Jörg Henkel, Sri Parameswaran: Rapid Configuration and Instruction Selection for an ASIP: A Case Study. DATE 2003: 10802-10809 | |
| 16 | Newton Cheung, Sri Parameswaran, Jörg Henkel: INSIDE: INstruction Selection/Identification & Design Exploration for Extensible Processors. ICCAD 2003: 291-298 | |
| 15 | Ramesh Chandra, Preeti Ranjan Panda, Jörg Henkel, Sri Parameswaran, Loganath Ramachandran: Specification and Design of Multi-Million Gate SOCs. VLSI Design 2003: 18-19 | |
| 2002 | ||
| 14 | Jörg Henkel, Xiaobo Sharon Hu, Rajesh Gupta, Sri Parameswaran: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002 ACM 2002 | |
| 13 | Tony Han, Sri Parameswaran: SWASAD: An ASIC Design for High Speed DNA Sequence Matching. VLSI Design 2002: 541-546 | |
| 2001 | ||
| 12 | Sri Parameswaran: Code placement in hardware/software co-synthesis to improve performance and reduce cost. DATE 2001: 626-632 | |
| 11 | Sri Parameswaran, Jörg Henkel: I-CoPES: Fast Instruction Code Placement for Embedded Systems to Improve Performance and Energy Efficiency. ICCAD 2001: 635- | |
| 2000 | ||
| 10 | Allan Rae, Sri Parameswaran: Voltage reduction of application-specific heterogeneous multiprocessor systems for power minimisation. ASP-DAC 2000: 147-152 | |
| 9 | V. E. Boros, Aleksandar D. Rakic, Sri Parameswaran: High-level model of a WDMA passive optical bus for a reconfigurable multiprocessor system. DAC 2000: 221-226 | |
| 8 | Sri Parameswaran, Matthew F. Parkinson, Peter Bartlett: Profiling in the ASP codesign environment. Journal of Systems Architecture 46(14): 1263-1274 (2000) | |
| 1998 | ||
| 7 | Sri Parameswaran: HW-SW Co-Synthesis: The Present and The Future (Embedded Tutorial). ASP-DAC 1998: 19-22 | |
| 6 | Sri Parameswaran, Hui Guo: Power Reduction in Pipelines. ASP-DAC 1998: 545-550 | |
| 5 | Hui Guo, Sri Parameswaran: Unrolling Loops With Indeterminate Loop Counts in System Level Pipelines. ASP-DAC 1998: 99-104 | |
| 4 | Allan Rae, Sri Parameswaran: Application-Specific Heterogeneous Multiprocessor Synthesis Using Differential-Evolution. ISSS 1998: 83-88 | |
| 1995 | ||
| 3 | Pradip K. Jha, Nikil D. Dutt, Sri Parameswaran: Reclocking for high-level synthesis. ASP-DAC 1995 | |
| 2 | Matthew F. Parkinson, Sri Parameswaran: Profiling in the ASP codesign environment. ISSS 1995: 128-133 | |
| 1994 | ||
| 1 | Sayed Mohammad Kia, Sri Parameswaran: Design automation of self checking circuits. EURO-DAC 1994: 252-257 | |