 | 2008 |
| 14 |  | Jorge Suris,
Cameron Patterson,
Peter Athanas:
An efficient run-time router for connecting modules in FPGAS.
FPL 2008: 125-130 |
| 13 |  | Matthew Shelburne,
Cameron Patterson,
Peter Athanas,
Mark Jones,
Brian Martin,
Ryan Fong:
Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.
FPL 2008: 257-262 |
| 2007 |
| 12 |  | Peter M. Athanas,
J. Bowen,
T. Dunham,
Cameron Patterson,
J. Rice,
Matthew Shelburne,
J. Surís,
Mark B. Bucciero,
Jonathan Graf:
Wires On Demand: Run-Time Communication Synthesis for Reconfigurable Computing.
FPL 2007: 513-516 |
| 2006 |
| 11 |  | Stephen D. Craven,
Cameron Patterson,
Peter M. Athanas:
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays.
HICSS 2006 |
| 2004 |
| 10 |  | Jesse Hunter,
Peter Athanas,
Cameron Patterson:
VTSim: A Virtex-II Device Simulator.
ERSA 2004: 297-298 |
| 9 |  | Alexandra Poetter,
Jesse Hunter,
Cameron Patterson,
Peter M. Athanas,
Brent E. Nelson,
Neil Steiner:
JHDLBits: The Merging of Two Worlds.
FPL 2004: 414-423 |
| 2003 |
| 8 |  | Cameron Patterson:
A Dynamic Module Server for Embedded Platform FPGAs.
Engineering of Reconfigurable Systems and Algorithms 2003: 31-40 |
| 2001 |
| 7 |  | Scott McMillan,
Cameron Patterson:
JBitsTM Implementations of the Advanced Encryption Standard (Rijndael).
FPL 2001: 162-171 |
| 6 |  | Tim Price,
Cameron Patterson:
Reconfigurable Breakpoints for Co-debug.
FPL 2001: 473-482 |
| 2000 |
| 5 |  | Cameron Patterson:
A Dynamic FPGA Implementation of the Serpent Block Cipher.
CHES 2000: 141-155 |
| 4 |  | Cameron Patterson:
High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm).
FCCM 2000: 113-121 |
| 1999 |
| 3 |  | James Hwang,
Cameron Patterson,
Sujoy Mitra:
VHDL Placement Directives for Parametric IP Blocks.
FCCM 1999: 284-285 |
| 2 |  | James Hwang,
Cameron Patterson,
Sujoy Mitra:
Hierarchical Placement Directives for Parametric IP Blocks.
FPGA 1999: 250 |
| 1998 |
| 1 |  | James Hwang,
Cameron Patterson,
S. Mohan,
Eric Dellinger,
Sujoy Mitra,
Ralph Wittig:
Generating Layouts for Self-implementing Modules.
FPL 1998: 525-529 |