 | 2008 |
|---|
| 6 |       | Armando Mora Campos,
Francisco Ballester,
Marcos Martínez Peiró,
José A. Canals Esteve:
Integer-pixel motion estimation H.264/AVC accelerator architecture with optimal memory management.
Microprocessors and Microsystems - Embedded Hardware Design 32(2): 68-78 (2008) |
| 2004 |
|---|
| 5 | | Marcos Martínez Peiró,
Francisco Ballester,
Guillermo Payá Vayá,
Ricardo José Colom-Palero,
Rafael Gadea Gironés,
J. Belenguer:
FPGA Custom DSP for ECG Signal Analysis and Compression.
FPL 2004: 954-958 |
| 4 |  | Arturo Méndez Patiño,
Marcos Martínez Peiró,
Francisco Ballester,
Guillermo Payá Vayá:
2D-DCT on FPGA by polynomial transformation in two-dimensions.
ISCAS (3) 2004: 365-368 |
| 3 | | Ricardo José Colom-Palero,
Rafael Gadea Gironés,
Francisco Ballester,
Marcos Martínez Peiró:
Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices.
Microprocessors and Microsystems 28(9): 509-518 (2004) |
| 2003 |
|---|
| 2 | | Guillermo Payá Vayá,
Marcos Martínez Peiró,
Francisco Ballester,
Francisco Mora Campos:
Fully Parameterized Discrete Wavelet Packet Transform Architecture Oriented to FPGA.
FPL 2003: 533-542 |
| 1 | | Arturo Méndez Patiño,
Marcos Martínez Peiró:
2D-DCT Implementation on FPGA by Polynomial Transformation in Two-Dimensions.
VLSI-SOC 2003: 432-438 |
