Chantana Chantrapornchai
List of publications from the DBLP Bibliography Server - FAQ
| 2008 | ||
|---|---|---|
| 24 | Chantana Phongpensri, K. Sripanomwan: Different Fuzzy Parameter Selection Based on Multiple Criteria for Microcontroller. EUC (1) 2008: 176-182 | |
| 23 | Chantana Phongpensri, Thanarat Rungthong: Vis-OOMPI: Visual Tool for Automatic Code Generation Based on C++/OOMPI. PVM/MPI 2008: 311-312 | |
| 2006 | ||
| 22 | Chantana Chantrapornchai, Wanlop Surakampontorn, Edwin Hsing-Mean Sha: Design Exploration With Imprecise Latency and Register Constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2650-2662 (2006) | |
| 2004 | ||
| 21 | Chantana Chantrapornchai, Wanlop Surakumpolthorn, Edwin Hsing-Mean Sha: Design Exploration Framework Under Impreciseness Based on Register-Constrained Inclusion Scheduling. ASIAN 2004: 78-92 | |
| 20 | Chantana Chantrapornchai, Wanlop Surakumpolthorn, Edwin Hsing-Mean Sha: Efficient Scheduling for Design Exploration with Imprecise Latency and Register Constraints. EUC 2004: 259-270 | |
| 2003 | ||
| 19 | Zili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai: Loop scheduling for minimizing schedule length and switching activities. ISCAS (5) 2003: 109-112 | |
| 18 | Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai: An Integrated Framework of Design Optimization and Space Minimization for DSP applications. ISCAS (5) 2003: 601-604 | |
| 17 | Chantana Chantrapornchai: Rapid Prototyping Methodology and Environments for Fuzzy Applications. International Conference on Computational Science 2003: 940-949 | |
| 2002 | ||
| 16 | Bin Xiao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai: Analysis and Algorithms for Partitioning of Large-scale Adaptive Mobile Networks. IASTED PDCS 2002: 302-308 | |
| 15 | Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Qingfeng Zhuge: Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops. ISSS 2002: 144-149 | |
| 2001 | ||
| 14 | Chantana Chantrapornchai, Sissades Tongsima: Resource Estimation Algorithm Under Impreciseness Using Inclusion Scheduling. Int. J. Found. Comput. Sci. 12(5): 581-598 (2001) | |
| 2000 | ||
| 13 | Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Hu: Efficient algorithms for acceptable design exploration. ACM Great Lakes Symposium on VLSI 2000: 139-142 | |
| 12 | Sissades Tongsima, Edwin Hsing-Mean Sha, Chantana Chantrapornchai, David R. Surma, Nelson L. Passos: Probabilistic Loop Scheduling for Applications with Uncertain Execution Time. IEEE Trans. Computers 49(1): 65-80 (2000) | |
| 11 | Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Sharon Hu: Efficient design exploration based on module utility selection. IEEE Trans. on CAD of Integrated Circuits and Systems 19(1): 19-29 (2000) | |
| 10 | Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Sharon Hu: Efficient module selections for finding highly acceptable designs based on inclusion scheduling. Journal of Systems Architecture 46(11): 1047-1071 (2000) | |
| 9 | Sissades Tongsima, Timothy W. O'Neil, Chantana Chantrapornchai, Edwin Hsing-Mean Sha: Properties and Algorithms for Unfolding of Probabilistic Data-Flow Graphs. VLSI Signal Processing 25(3): 215-233 (2000) | |
| 1999 | ||
| 8 | Chantana Chantrapornchai, Sissades Tongsima, Edwin Hsing-Mean Sha: Rapid Prototyping Techniques for Fuzzy Controllers. ASIAN 1999: 37-49 | |
| 7 | Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Xiaobo Sharon Hu: Efficient Algorithms for Finding Highly Acceptable Designs Based on Module-Utility Selections. Great Lakes Symposium on VLSI 1999: 128-131 | |
| 1998 | ||
| 6 | Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapornchai, Peter M. Kogge: Optimizing Data Scheduling on Processor-in-Memory Arrays. IPPS/SPDP 1998: 57-61 | |
| 5 | Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha: Probabilistic Loop Scheduling Considering Communication Overhead. JSSPP 1998: 158-179 | |
| 4 | Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos: Reducing Data Hazards on Multi-pipelined DSP Architecture with Loop Scheduling. VLSI Signal Processing 18(2): 111-123 (1998) | |
| 1997 | ||
| 3 | Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos: Scheduling with Confidence for Probabilistic Data-flow Graphs. Great Lakes Symposium on VLSI 1997: 150-155 | |
| 2 | Sissades Tongsima, Chantana Chantrapornchai, Edwin Hsing-Mean Sha, Nelson L. Passos: Probabilistic Rotation: Scheduling Graphs with Uncertain Execution Time. ICPP 1997: 292- | |
| 1996 | ||
| 1 | Chantana Chantrapornchai, Sissades Tongsima, Edwin Hsing-Mean Sha: Rapid Prototyping for Fuzzy Systems. Great Lakes Symposium on VLSI 1996: 234-239 | |
| 1 | Xiaobo Sharon Hu (Xiaobo Hu) | [7] [10] [11] [13] |
| 2 | Peter M. Kogge | [6] |
| 3 | Timothy W. O'Neil | [9] |
| 4 | Nelson L. Passos | [2] [3] [4] [12] |
| 5 | Thanarat Rungthong | [23] |
| 6 | Edwin Hsing-Mean Sha | [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15] [16] [18] [19] [20] [21] [22] |
| 7 | Zili Shao | [15] [19] |
| 8 | K. Sripanomwan | [24] |
| 9 | Wanlop Surakampontorn | [22] |
| 10 | Wanlop Surakumpolthorn | [20] [21] |
| 11 | David R. Surma | [12] |
| 12 | Yi Tian | [6] |
| 13 | Sissades Tongsima | [1] [2] [3] [4] [5] [8] [9] [12] [14] |
| 14 | Bin Xiao | [15] [16] |
| 15 | Qingfeng Zhuge | [15] [16] [18] [19] |