Laurence V. Pierre
List of publications from the DBLP Bibliography Server - FAQ
| 2009 | ||
|---|---|---|
| 18 | Florent Ouchet, Dominique Borrione, Katell Morin-Allory, Laurence Pierre: High-level symbolic simulation for automatic model extraction. DDECS 2009: 218-221 | |
| 2008 | ||
| 17 | Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz: Executable formal specification and validation of NoC communication infrastructures. SBCCI 2008: 176-181 | |
| 16 | Laurence Pierre, Luca Ferro: A Tractable and Fast Method for Monitoring SystemC TLM Specifications. IEEE Trans. Computers 57(10): 1346-1356 (2008) | |
| 2007 | ||
| 15 | Dominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz: A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. NOCS 2007: 127-136 | |
| 2004 | ||
| 14 | Magali Contensin, Laurence Pierre: Model-Checking Systems with Unbounded Variables without Abstraction. AMAST 2004: 87-111 | |
| 2003 | ||
| 13 | Magali Contensin, Laurence Pierre: Combining ACL2 and a v-calculus Model-Checker to Verify System-Level Designs. MEMOCODE 2003: 75- | |
| 12 | Eric Gascard, Laurence Pierre: Formal Proof of Applications Distributed in Symmetric Interconnection Networks. Parallel Processing Letters 13(1): 3-18 (2003) | |
| 2002 | ||
| 11 | Eric Gascard, Laurence Pierre: Mechanical Verification of Hypercube Algorithms. IPDPS 2002 | |
| 2001 | ||
| 10 | Eric Gascard, Laurence Pierre: Induction-Oriented Formal Verification in Symmetric Interconnection Networks. CHARME 2001: 418-432 | |
| 2000 | ||
| 9 | Dominique Borrione, Julia Dushina, Laurence V. Pierre: A compositional model for the functional verification of high-level synthesis results. IEEE Trans. VLSI Syst. 8(5): 526-530 (2000) | |
| 1999 | ||
| 8 | Laurence Pierre, Thomas Kropf: Correct Hardware Design and Verification Methods, 10th IFIP WG 10.5 Advanced Research Working Conference, CHARME '99, Bad Herrenalb, Germany, September 27-29, 1999, Proceedings Springer 1999 | |
| 1995 | ||
| 7 | Laurence Pierre: Describing and verifying synchronous circuits with the Boyer-Moore theorem prover. CHARME 1995: 35-55 | |
| 1994 | ||
| 6 | Michel Allemand, Felix Nicoli, Laurence Pierre: Formal Verification of Hardware using LP and Comparison with Nqthm. Applied Informatics 1994: 150-153 | |
| 5 | Felix Nicoli, Laurence Pierre: Formal verification of behavioral VHDL specifications: a case study. EURO-DAC 1994: 560-565 | |
| 4 | Laurence Pierre: An Automatic Generalization Method for the Inductive Proof of Replicated and Parallel Architectures. TPCD 1994: 72-91 | |
| 1993 | ||
| 3 | George J. Milne, Laurence Pierre: Correct Hardware Design and Verification Methods, IFIP WG 10.5 Advanced Research Working Conference, CHARME '93, Arles, France, May 24-26, 1993, Proceedings Springer 1993 | |
| 2 | Laurence Pierre: VHDL Description and Formal Verification of Systolic Multipliers. CHDL 1993: 225-242 | |
| 1992 | ||
| 1 | Dominique Borrione, Laurence V. Pierre, Ashraf M. Salem: Formal Verification of VHDL Descriptions in the Prevail Environment. IEEE Design & Test of Computers 9(2): 42-56 (1992) | |
| 1 | Michel Allemand | [6] |
| 2 | Dominique Borrione | [1] [9] [15] [17] [18] |
| 3 | Magali Contensin | [13] [14] |
| 4 | Julia Dushina | [9] |
| 5 | Luca Ferro | [16] |
| 6 | Eric Gascard | [10] [11] [12] |
| 7 | Amr Helmy | [15] [17] |
| 8 | Thomas Kropf | [8] |
| 9 | George J. Milne | [3] |
| 10 | Katell Morin-Allory | [18] |
| 11 | Felix Nicoli | [5] [6] |
| 12 | Florent Ouchet | [18] |
| 13 | Ashraf M. Salem | [1] |
| 14 | Julien Schmaltz | [15] [17] |