| 2009 | ||
|---|---|---|
| 53 | Markus Happe, Enno Lübbers, Marco Platzner: A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. ARC 2009: 380-385 | |
| 52 | Heiner Giefers, Marco Platzner: ARMLang: A language and compiler for programming reconfigurable mesh many-cores. IPDPS 2009: 1-8 | |
| 2008 | ||
| 51 | Tobias Schumacher, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, Marco Platzner: A Hardware Accelerator for k-th Nearest Neighbor Thinning. ERSA 2008: 245-251 | |
| 50 | Marco Platzner, Sven Döhre, Markus Happe, Tobias Kenter, Ulf Lorenz, Tobias Schumacher, Andre Send, Alexander Warkentin: The GOmputer: Accelerating GO with FPGAs. ERSA 2008: 35-45 | |
| 49 | Enno Lübbers, Marco Platzner: Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. ERSA 2008: 83-89 | |
| 48 | Enno Lübbers, Marco Platzner: A portable abstraction layer for hardware threads. FPL 2008: 17-22 | |
| 47 | Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348 | |
| 46 | Paul Kaufmann, Marco Platzner: Advanced techniques for the creation and propagation of modules in cartesian genetic programming. GECCO 2008: 1219-1226 | |
| 45 | Kyrre Glette, Jim Torresen, Paul Kaufmann, Marco Platzner: A Comparison of Evolvable Hardware Architectures for Classification Tasks. ICES 2008: 22-33 | |
| 2007 | ||
| 44 | Paul Kaufmann, Marco Platzner: MOVES: A Modular Framework for Hardware Evolution. AHS 2007: 447-454 | |
| 43 | Paul Kaufmann, Marco Platzner: Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. ARCS 2007: 199-208 | |
| 42 | Heiner Giefers, Marco Platzner: A Many-core Implementation based on the Reconfigurable Mesh Model. FPL 2007: 41-46 | |
| 41 | Enno Lübbers, Marco Platzner: ReconOS: An RTOS supporting Hard- and Software Threads. FPL 2007: 441-446 | |
| 40 | Tobias Schumacher, Enno Lübbers, Paul Kaufmann, Marco Platzner: Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. PARCO 2007: 749-756 | |
| 2006 | ||
| 39 | Klaus Danne, Roland Muhlenbernd, Marco Platzner: Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions. FPL 2006: 1-6 | |
| 38 | Klaus Danne, Marco Platzner: Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware. IPDPS 2006 | |
| 37 | Klaus Danne, Marco Platzner: An EDF schedulability test for periodic tasks on reconfigurable hardware devices. LCTES 2006: 93-102 | |
| 2005 | ||
| 36 | Christian Plessl, Marco Platzner: Zippy - A coarse-grained reconfigurable array with support for hardware virtualization. ASAP 2005: 213-218 | |
| 35 | Klaus Danne, Marco Platzner: A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware. FPL 2005: 568-573 | |
| 34 | Klaus Danne, Marco Platzner: Periodic Real-Time Scheduling for FPGA Computers. WISES 2005: 117-127 | |
| 33 | Rolf Enzler, Christian Plessl, Marco Platzner: System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems 29(2-3): 63-73 (2005) | |
| 2004 | ||
| 32 | Jürgen Becker, Marco Platzner, Serge Vernalde: Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings Springer 2004 | |
| 31 | Herbert Walder, Samuel Nobs, Marco Platzner: XF-Board: A Prototyping Platform for Reconfigurable Hardware Operating Systems. ERSA 2004: 306 | |
| 30 | Christian Plessl, Marco Platzner: Virtualization of Hardware - Introduction and Survey. ERSA 2004: 63-69 | |
| 29 | Matthias Dyer, Marco Platzner, Lothar Thiele: Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. FCCM 2004: 342-344 | |
| 28 | Herbert Walder, Marco Platzner: A Runtime Environment for Reconfigurable Hardware Operating Systems. FPL 2004: 831-835 | |
| 27 | Christoph Steiger, Herbert Walder, Marco Platzner: Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks. IEEE Trans. Computers 53(11): 1393-1407 (2004) | |
| 2003 | ||
| 26 | Herbert Walder, Marco Platzner: Online Scheduling for Block-Partitioned Reconfigurable Devices . DATE 2003: 10290-10295 | |
| 25 | Rolf Enzler, Christian Plessl, Marco Platzner: Co-Simulation of a Hybrid Multi-Context Architecture. Engineering of Reconfigurable Systems and Algorithms 2003: 174-180 | |
| 24 | Herbert Walder, Marco Platzner: Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations. Engineering of Reconfigurable Systems and Algorithms 2003: 284-287 | |
| 23 | Rolf Enzler, Christian Plessl, Marco Platzner: Virtualizing Hardware with Multi-context Reconfigurable Arrays. FPL 2003: 151-160 | |
| 22 | Christoph Steiger, Herbert Walder, Marco Platzner: Heuristics for Onine Scheduling Real-Time Tasks to Partially Reconfigurable Devices. FPL 2003: 575-584 | |
| 21 | Herbert Walder, Christoph Steiger, Marco Platzner: Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing. IPDPS 2003: 178 | |
| 20 | Christoph Steiger, Herbert Walder, Marco Platzner, Lothar Thiele: Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices. RTSS 2003: 224-235 | |
| 19 | Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, Gerhard Tröster: The case for reconfigurable hardware in wearable computing. Personal and Ubiquitous Computing 7(5): 299-308 (2003) | |
| 18 | Christian Plessl, Marco Platzner: Instance-Specific Accelerators for Minimum Covering. The Journal of Supercomputing 26(2): 109-129 (2003) | |
| 2002 | ||
| 17 | Christian Plessl, Marco Platzner: Custom Computing Machines for the Set Covering Problem. FCCM 2002: 163-172 | |
| 16 | Matthias Dyer, Christian Plessl, Marco Platzner: Partially Reconfigurable Cores for Xilinx Virtex. FPL 2002: 292-301 | |
| 15 | Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele: Reconfigurable Hardware in Wearable Computing Nodes. ISWC 2002: 215-222 | |
| 14 | Michael Eisenring, Marco Platzner: A Framework for Run-time Reconfigurable Systems. The Journal of Supercomputing 21(2): 145-159 (2002) | |
| 2001 | ||
| 13 | Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn: Object-oriented domain specific compilers for programming FPGAs. IEEE Trans. VLSI Syst. 9(1): 205-210 (2001) | |
| 2000 | ||
| 12 | Michael Eisenring, Marco Platzner: Optimization of Run-Time Reconfigurable Embedded Systems. FPL 2000: 565-574 | |
| 11 | Michael Eisenring, Marco Platzner: An Implementation Framework for Run-time Reconfigurable Systems. PDPTA 2000 | |
| 10 | Marco Platzner: Reconfigurable Accelerators for Combinatorial Problems. IEEE Computer 33(4): 58-60 (2000) | |
| 9 | Marco Platzner, Bernhard Rinner, Reinhold Weiss: Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim. IEEE Intelligent Systems 15(2): 62-68 (2000) | |
| 1999 | ||
| 8 | Michael Eisenring, Marco Platzner, Lothar Thiele: Communication Synthesis for Reconfigurable Embedded Systems. FPL 1999: 205-214 | |
| 7 | Oskar Mencer, Marco Platzner: Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. HICSS 1999 | |
| 1998 | ||
| 6 | Marco Platzner, Giovanni De Micheli: Acceleration of Satisfiability Algorithms by Reconfigurable Hardware. FPL 1998: 69-78 | |
| 1997 | ||
| 5 | Marco Platzner, Bernhard Rinner, Reinhold Weiss: Parallel qualitative simulation. Simul. Pr. Theory 5(7-8): 623-638 (1997) | |
| 1995 | ||
| 4 | Marco Platzner, Bernhard Rinner, Reinhold Weiss: Parallel Qualitative Simulation. EUROSIM 1995: 231-236 | |
| 3 | Gerald Friedl, Marco Platzner, Bernhard Rinner: A Special-purpose Coprocessor for Qualitative Simulation. Euro-Par 1995: 695-698 | |
| 2 | Marco Platzner, Bernhard Rinner, Reinhold Weiss: A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs. PDP 1995: 311-318 | |
| 1 | Marco Platzner, Bernhard Rinner, Reinhold Weiss: Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J. UCS 1(12): 811-820 (1995) | |