| 2009 | ||
|---|---|---|
| 46 | Markus Koester, Wayne Luk, Jens Hagemeyer, Mario Porrmann: Design optimizations to improve placeability of partial reconfiguration modules. DATE 2009: 976-981 | |
| 45 | Madhura Purnaprajna, Christopher Pohl, Mario Porrmann, Ulrich Rückert: Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing. ERSA 2009: 119-125 | |
| 44 | Paolo Roberto Grassi, Marco D. Santambrogio, Jens Hagemeyer, Christopher Pohl, Mario Porrmann: SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. ERSA 2009: 174-180 | |
| 2008 | ||
| 43 | Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann: Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography. DATE 2008: 1462-1467 | |
| 42 | Björn Griese, André Brinkmann, Mario Porrmann: SelfS - A real-time protocol for virtual ring topologies. IPDPS 2008: 1-8 | |
| 41 | Christoph Puttmann, Jamshid Shokrollahi, Mario Porrmann: Resource Efficiency of Instruction Set Extensions for Elliptic Curve Cryptography. ITNG 2008: 131-136 | |
| 2007 | ||
| 40 | Jörg-Christian Niemann, Christian Liß, Mario Porrmann, Ulrich Rückert: A Multiprocessor Cache for Massively Parallel SoC Architectures. ARCS 2007: 83-97 | |
| 39 | Christoph Puttmann, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert: GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors. DSD 2007: 495-502 | |
| 38 | Jens Hagemeyer, Boris Kettelhoit, Markus Koester, Mario Porrmann: Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs. ERSA 2007: 238-247 | |
| 37 | Jens Hagemeyer, Boris Kettelhoit, Markus Koester, Mario Porrmann: A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs. FPL 2007: 331-338 | |
| 36 | Vincenzo Rana, Marco D. Santambrogio, Donatella Sciuto, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert: Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux. IPDPS 2007: 1-8 | |
| 35 | Carlos Paiz, Boris Kettelhoit, Mario Porrmann: A design framework for FPGA-based dynamically reconfigurable digital controllers. ISCAS 2007: 3708-3711 | |
| 34 | Jörg-Christian Niemann, Christoph Puttmann, Mario Porrmann, Ulrich Rückert: Resource efficiency of the GigaNetIC chip multiprocessor architecture. Journal of Systems Architecture 53(5-6): 285-299 (2007) | |
| 2006 | ||
| 33 | Jörg-Christian Niemann, Christoph Puttmann, Mario Porrmann, Ulrich Rückert: GigaNetIC - A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications. ARCS 2006: 268-282 | |
| 32 | Björn Griese, Mario Porrmann: A Reconfigurable Ethernet Switch for Self-Optimizing Communication Systems. BICC 2006: 115-124 | |
| 31 | Heiko Kalte, Mario Porrmann: REPLICA2Pro: task relocation by bitstream manipulation in virtex-II/Pro FPGAs. Conf. Computing Frontiers 2006: 403-412 | |
| 30 | Markus Koester, Heiko Kalte, Mario Porrmann: Relocation and Defragmentation for Heterogeneous Reconfigurable Systems. ERSA 2006: 70-76 | |
| 29 | Boris Kettelhoit, Mario Porrmann: A Layer Model for Systematically Designing Dynamically Reconfigurable Systems. FPL 2006: 1-6 | |
| 28 | Carlos Paiz, Christopher Pohl, Mario Porrmann: Reconfigurable hardware in-the-loop simulations for digital control design. ICINCO-SPSMC 2006: 39-46 | |
| 27 | Jens Hagemeyer, Boris Kettelhoit, Mario Porrmann: Dedicated module access in dynamically reconfigurable systems. IPDPS 2006 | |
| 26 | Bjørn Jager, Mario Porrmann, Ulrich Rückert: Bio-inspired massively parallel architectures for nanotechnologies. ISCAS 2006 | |
| 25 | Björn Griese, Boris Kettelhoit, Mario Porrmann: Evaluation of On-Chip Interfaces for Dynamically Reconfigurable Coprocessors. PARELEC 2006: 214-219 | |
| 24 | Christian Sauer, Matthias Gries, Jörg-Christian Niemann, Mario Porrmann, Michael Thies: Application-Driven Development of Concurrent Packet Processing Platforms. PARELEC 2006: 55-61 | |
| 2005 | ||
| 23 | Heiko Kalte, Mario Porrmann: Context Saving and Restoring for Multitasking in Reconfigurable Systems. FPL 2005: 223-228 | |
| 22 | Markus Koester, Mario Porrmann, Heiko Kalte: Task Placement for Heterogeneous Reconfigurable Architectures. FPT 2005: 43-50 | |
| 21 | Markus Koester, Mario Porrmann, Ulrich Rückert: Placement-Oriented Modeling of Partially Reconfigurable Architectures. IPDPS 2005 | |
| 20 | Heiko Kalte, Gareth Lee, Mario Porrmann, Ulrich Rückert: REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems. IPDPS 2005 | |
| 19 | Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert: A Scalable Parallel SoC Architecture for Network Processors. ISVLSI 2005: 311-313 | |
| 18 | Markus Koester, Heiko Kalte, Mario Porrmann, Ulrich Rückert: Defragmentation Algorithms for Partially Reconfigurable Hardware. VLSI-SoC 2005: 41-53 | |
| 17 | Heiko Kalte, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert: A system approach for partially reconfigurable architectures. IJES 1(3/4): 274-290 (2005) | |
| 2004 | ||
| 16 | Heiko Kalte, Mario Porrmann, Ulrich Rückert: Leistungsbewertung unterschiedlicher Einbettungsvariaten dynamisch rekonfigurierbarer Hardware. ARCS Workshops 2004: 235-244 | |
| 15 | Matthias Grünewald, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert: A Mapping Strategy for Resource-Efficient Network Processing on Multiprocessor SoC. DATE 2004: 758-763 | |
| 14 | Heiko Kalte, Markus Koester, Boris Kettelhoit, Mario Porrmann, Ulrich Rückert: A Comparative Study on System Approaches for Partially Reconfigurable Architectures. ERSA 2004: 70-76 | |
| 13 | Björn Griese, Erik Vonnahme, Mario Porrmann, Ulrich Rückert: Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures. FPL 2004: 842-846 | |
| 12 | Heiko Kalte, Mario Porrmann, Ulrich Rückert: System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement. IPDPS 2004 | |
| 11 | Matthias Grünewald, Dinh Khoi Le, Uwe Kastens, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies: Network Application Driven Instruction Set Extensions for Embedded Processing Clusters. PARELEC 2004: 209-214 | |
| 10 | Marc Franzmeier, Christopher Pohl, Mario Porrmann, Ulrich Rückert: Hardware Accelerated Data Analysis. PARELEC 2004: 309-314 | |
| 9 | Erik Vonnahme, Björn Griese, Mario Porrmann, Ulrich Rückert: Dynamic Reconfiguration of Real-Time Network Interfaces. PARELEC 2004: 376-379 | |
| 2003 | ||
| 8 | Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, Jörg-Christian Niemann, Mario Porrmann, Ulrich Rückert, Adrian Slowik, Michael Thies: A holistic methodology for network processor design. LCN 2003: 583- | |
| 2002 | ||
| 7 | Mario Porrmann, Marc Franzmeier, Heiko Kalte, Ulf Witkowski, Ulrich Rückert: A reconfigurable SOM hardware accelerator. ESANN 2002: 337-342 | |
| 6 | Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rückert: Dynamically Reconfigurable Hardware - A New Perspective for Neural Network Implementations. FPL 2002: 1048-1057 | |
| 5 | Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rückert: Implementation of Artificial Neural Networks on a Reconfigurable Hardware Accelerator. PDP 2002: 243- | |
| 2000 | ||
| 4 | Heiko Kalte, Mario Porrmann, Ulrich Rückert: Using a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics. PDPTA 2000 | |
| 1998 | ||
| 3 | Stefan Rüping, Mario Porrmann, Ulrich Rückert: SOM accelerator system. Neurocomputing 21(1-3): 31-50 (1998) | |
| 1997 | ||
| 2 | Mario Porrmann, Ulrich Rückert, Karl Michael Marks, Jörg Landmann: HiBRIC-MEM, a Memory Controller for PowerPC Based Systems. EUROMICRO 1997: 653-657 | |
| 1 | Stefan Rüping, Mario Porrmann, Ulrich Rückert: A High Performance SOFM Hardware-System. IWANN 1997: 772-781 | |