Dhiraj K. Pradhan

	2012
200		Pranav Yeolekar, Rishad A. Shafik, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: STEP: a unified design methodology for secure test and IP core protection. ACM Great Lakes Symposium on VLSI 2012: 333-338
199		Saraju P. Mohanty, Jawar Singh, Elias Kougianos, Dhiraj K. Pradhan: Statistical DOE-ILP based power-performance-process (P3) optimization of nano-CMOS SRAM. Integration 45(1): 33-45 (2012)
	2011
198		Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan: A dynamically error correctable bit parallel Montgomery multiplier over binary extension fields. ECCTD 2011: 600-603
197		Mahesh Poolakkaparambil, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan, Saraju P. Mohanty: BCH code based multiple bit error correction in finite field multiplier circuits. ISQED 2011: 615-620
196		S. Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty, Maciej J. Ciesielski: Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage Optimization. VLSI Design 2011: 304-309
195		Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Bhargab B. Bhattacharya, Saraju P. Mohanty: A Routing-Aware ILS Design Technique. IEEE Trans. VLSI Syst. 19(12): 2335-2338 (2011)
194		Costas Argyrides, Dhiraj K. Pradhan, Taskin Koçak: Matrix Codes for Reliable and Cost Efficient Memory Chips. IEEE Trans. VLSI Syst. 19(3): 420-428 (2011)
193		Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan: Low Latency and Energy Efficient Scalable Architecture for Massive NoCs Using Generalized de Bruijn Graph. IEEE Trans. VLSI Syst. 19(8): 1469-1480 (2011)
192		Costas Argyrides, Raul Chipana, Fabian Vargas, Dhiraj K. Pradhan: Reliability Analysis of H-Tree Random Access Memories Implemented With Built in Current Sensors and Parity Codes for Multiple Bit Upset Correction. IEEE Transactions on Reliability 60(3): 528-537 (2011)
191		Vishram Mishra, Jimson Mathew, Dhiraj K. Pradhan: Fault-tolerant de-Bruijn graph based multipurpose architecture and routing protocol for wireless sensor networks. IJSNet 10(3): 160-175 (2011)
190		Juan Antonio Maestro, Pedro Reviriego, Costas Argyrides, Dhiraj K. Pradhan: Fault Tolerant Single Error Correction Encoders. J. Electronic Testing 27(2): 215-218 (2011)
189		Shibaji Banerjee, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan, Maciej J. Ciesielski: A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS Register-Transfer Level Leakage Optimization. J. Low Power Electronics 7(4): 471-481 (2011)
	2010
188		Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan: A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM. ACM Great Lakes Symposium on VLSI 2010: 323-328
187		Nikolaos Mavrogiannakis, Costas Argyrides, Dhiraj K. Pradhan: Improving reliability for bit parallel finite field multipliers using Decimal Hamming. EWDTS 2010: 69-72
186		Jawar Singh, Dilip S. Aswar, Saraju P. Mohanty, Dhiraj K. Pradhan: A 2-port 6T SRAM bitcell design with multi-port capabilities at reduced area overhead. ISQED 2010: 131-138
185		Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan: P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP. ISQED 2010: 176-183
184		Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir, Saraju P. Mohanty, Dhiraj K. Pradhan: On the design of different concurrent EDC schemes for S-Box and GF(p). ISQED 2010: 211-218
183		Savita Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: Layout-aware Illinois Scan design for high fault coverage coverage. ISQED 2010: 683-688
182		Costas Argyrides, Nikolaos Mavrogiannakis, Dhiraj K. Pradhan: Improved Yield in Nanotechnology Circuits Using Non-square Meshes. ISVLSI 2010: 410-415
181		Anas Abu Taleb, Jimson Mathew, Dhiraj K. Pradhan: Fault diagnosis in multi layered De Bruijn based architectures for sensor networks. PerCom Workshops 2010: 456-461
180		Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan: A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM. VLSI Design 2010: 45-50
179		Jimson Mathew, Savita Banerjee, Hafizur Rahaman, Dhiraj K. Pradhan, Saraju P. Mohanty, Abusaleh M. Jabir: On the synthesis of attack tolerant cryptographic hardware. VLSI-SoC 2010: 286-291
178		Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan: Secure Testable S-box Architecture for Cryptographic Hardware Implementation. Comput. J. 53(5): 581-591 (2010)
177		Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan: Test Generation in Systolic Architecture for Multiplication Over GF(2 m). IEEE Trans. VLSI Syst. 18(9): 1366-1371 (2010)
176		Jimson Mathew, Abusaleh M. Jabir, Ashutosh Kumar Singh, Hafizur Rahaman, Dhiraj K. Pradhan: A Galois field-based logic synthesis with testability. IET Computers & Digital Techniques 4(4): 263-273 (2010)
175		Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan: Simplified bit parallel systolic multipliers for special class of galois field (2m) with testability. IET Computers & Digital Techniques 4(5): 428-437 (2010)
174		Garima Thakral, Saraju P. Mohanty, Dhiraj K. Pradhan, Elias Kougianos: DOE-ILP Based Simultaneous Power and Read Stability Optimization in Nano-CMOS SRAM. J. Low Power Electronics 6(3): 390-400 (2010)
173		Taskin Koçak, Dhiraj K. Pradhan: Introduction to design techniques for energy harvesting. JETC 6(2): (2010)
172		Saraju P. Mohanty, Dhiraj K. Pradhan: ULS: A dual-Vth/high-kappa nano-CMOS universal level shifter for system-level power management. JETC 6(2): (2010)
	2009
171		Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew: Single ended 6T SRAM with isolated read-port for low-power embedded systems. DATE 2009: 917-922
170		Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro: A fast error correction technique for matrix multiplication algorithms. IOLTS 2009: 133-137
169		Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan: C-testable S-box implementation for secure advanced encryption standard. IOLTS 2009: 210-211
168		Costas Argyrides, Ahmad A. Al-Yamani, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan: Increasing memory yield in future technologies through innovative design. ISQED 2009: 622-626
167		Costas Argyrides, Giorgos Dimosthenous, Dhiraj K. Pradhan, Carlos Arthur Lang Lisbôa, Luigi Carro: Reliability aware yield improvement technique for nanotechnology based circuits. SBCCI 2009
166		Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan: Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. VLSI Design 2009: 307-312
165		Jimson Mathew, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan: Single error correctable bit parallel multipliers over GF(2m). IET Computers & Digital Techniques 3(3): 281-288 (2009)
164		Dmitri Maslov, Jimson Mathew, Donny Cheung, Dhiraj K. Pradhan: An O(m2)-depth quantum algorithm for the elliptic curve discrete logarithm problem over GF(2m)a. Quantum Information & Computation 9(7): 610-621 (2009)
	2008
163		Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan: De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs. DATE 2008: 1370-1373
162		Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan: Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. IOLTS 2008: 155-160
161		Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan: Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection. IOLTS 2008: 16-21
160		Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan: Fault Tolerant Reversible Finite Field Arithmetic Circuits. IOLTS 2008: 188-189
159		Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan: Fault tolerant bit parallel finite field multipliers using LDPC codes. ISCAS 2008: 1684-1687
158		Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan: A nano-CMOS process variation induced read failure tolerant SRAM cell. ISCAS 2008: 3334-3337
157		Costas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan: Area Reliability Trade-Off in Improved Reed Muller Coding. SAMOS 2008: 116-125
156		Yi Xin Su, Jimson Mathew, Jawar Singh, Dhiraj K. Pradhan: Pseudo parallel architecture for AES with error correction. SoCC 2008: 187-190
155		Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies. SoCC 2008: 243-246
154		Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty: Failure analysis for ultra low power nano-CMOS SRAM under process variations. SoCC 2008: 251-254
153		Donny Cheung, Dmitri Maslov, Jimson Mathew, Dhiraj K. Pradhan: On the Design and Optimization of a Quantum Polynomial-Time Attack on Elliptic Curve Cryptography. TQC 2008: 96-104
152		Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan: Single Error Correcting Finite Field Multipliers Over GF(2m). VLSI Design 2008: 33-38
151		Jimson Mathew, Hafizur Rahaman, Babita R. Jose, Dhiraj K. Pradhan: Design of Reversible Finite Field Arithmetic Circuits with Error Detection. VLSI Design 2008: 453-459
150		Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan: A Galois Field Based Logic Synthesis Approach with Testability. VLSI Design 2008: 629-634
149		Carlos Arthur Lang Lisbôa, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro: Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. VTS 2008: 363-370
148		Bharat Joshi, Dhiraj K. Pradhan, Jack Stiffler: Fault-Tolerant Computing. Wiley Encyclopedia of Computer Science and Engineering 2008
147		Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir: C-testable bit parallel multipliers over GF(2m). ACM Trans. Design Autom. Electr. Syst. 13(1): (2008)
146		Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir: Derivation of Reduced Test Vectors for Bit-Parallel Multipliers over GF(2^m). IEEE Trans. Computers 57(9): 1289-1294 (2008)
145		Abusaleh M. Jabir, Dhiraj K. Pradhan, Jimson Mathew: GfXpress: A Technique for Synthesis and Optimization of GF(2m) Polynomials. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 698-711 (2008)
144		Jayawant Kakade, Dimitrios Kagaris, Dhiraj K. Pradhan: Evaluation of Generalized LFSRs as Test Pattern Generators in Two-Dimensional Scan Designs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1689-1692 (2008)
143		Hongwei Zhu, Ilie I. Luican, Florin Balasa, Dhiraj K. Pradhan: Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems. IEICE Transactions 91-A(12): 3559-3567 (2008)
142		Saraju P. Mohanty, Elias Kougianos, Dhiraj K. Pradhan: Simultaneous scheduling and binding for low gate leakage nano-complementary metaloxide-semiconductor data path circuit behavioural synthesis. IET Computers & Digital Techniques 2(2): 118-131 (2008)
	2007
141		Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan: Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories. DFT 2007: 340-348
140		Jawar Singh, Jimson Mathew, Mohammad Hosseinabady, Dhiraj K. Pradhan: Single Event Upset Detection and Correction. ICIT 2007: 13-18
139		Costas Argyrides, Dhiraj K. Pradhan: Highly Reliable Power Aware Memory Design. IOLTS 2007: 189-190
138		Jimson Mathew, Hafizur Rahaman, Dhiraj K. Pradhan: Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test set. IOLTS 2007: 207-208
137		Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan: Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs. IPDPS 2007: 1-6
136		Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew: Soft Error Mitigation in Switch Modules of SRAM-based FPGAs. ISCAS 2007: 141-144
135		R. Stapenhurst, K. Maharatna, Jimson Mathew, José L. Núñez-Yáñez, Dhiraj K. Pradhan: On the Hardware Reduction of z-Datapath of Vectoring CORDIC. ISCAS 2007: 3002-3005
134		Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan: Multiple Upsets Tolerance in SRAM Memory. ISCAS 2007: 365-368
133		Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew: CAD-Directed SEU Susceptibility Reduction in FPGA Circuits Designs. ISCAS 2007: 3675-3678
132		Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan: CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs. ISCAS 2007: 3696-3699
131		Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew: SEU-Mitigation Placement and Routing Algorithms and Their Impact in SRAM-Based FPGAs. ISQED 2007: 380-385
130		S. Ramsundar, Ahmad A. Al-Yamani, Dhiraj K. Pradhan: Defect Tolerance in Nanotechnology Switches Using a Greedy Reconfiguration Algorithm. ISQED 2007: 807-813
129		Costas Argyrides, Carlos Arthur Lang Lisbôa, Luigi Carro, Dhiraj K. Pradhan: A soft error robust and power aware memory design. SBCCI 2007: 300-305
128		Costas Argyrides, Ahmad A. Al-Yamani, Dhiraj K. Pradhan: High defect tolerant low cost memory chips. SoCC 2007: 119-122
127		Babita R. Jose, Jimson Mathew, P. Mythili, Dhiraj K. Pradhan: A triple-mode feed-forward sigma-delta modulator design for GSM / WCDMA / WLAN applications. SoCC 2007: 309-312
126		Costas Argyrides, Dhiraj K. Pradhan: Improved decoding algorithm for high reliable reed muller coding. SoCC 2007: 95-98
125		Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan: Constant Function Independent Test Set for Fault Detection in Bit Parallel Multipliers in GF(2^m). VLSI Design 2007: 479-484
124		Hafizur Rahaman, Jimson Mathew, Biplab K. Sikdar, Dhiraj K. Pradhan: Transition Fault Testability in Bit Parallel Multipliers over GF(2^{m}). VTS 2007: 422-430
123		Abusaleh M. Jabir, Dhiraj K. Pradhan: A Graph-Based Unified Technique for Computing and Representing Coefficients over Finite Fields. IEEE Trans. Computers 56(8): 1119-1132 (2007)
122		Abusaleh M. Jabir, Dhiraj K. Pradhan, T. L. Rajaprabhu, Ashutosh Kumar Singh: A Technique for Representing Multiple Output Binary Functions with Applications to Verification and Simulation. IEEE Trans. Computers 56(8): 1133-1145 (2007)
	2006
121		Chunsheng Liu, Zach Link, Dhiraj K. Pradhan: Reuse-based test access and integrated test scheduling for network-on-chip. DATE 2006: 303-308
120		Abusaleh M. Jabir, Dhiraj K. Pradhan, Jimson Mathew: An efficient technique for synthesis and optimization of polynomials in GF(2m). ICCAD 2006: 151-157
119		Chunsheng Liu, Vikram Iyengar, Dhiraj K. Pradhan: Thermal-Aware Testing of Network-on-Chip Using Multiple-Frequency Clocking. VTS 2006: 46-51
	2005
118		Dhiraj K. Pradhan, Dimitri Kagaris, Rohit Gambhir: A Hamming Distance Based Test Pattern Generator with Improved Fault Coverage. IOLTS 2005: 221-226
117		S. Chidambaram, Dimitrios Kagaris, Dhiraj K. Pradhan: Comparative study of CA with phase shifters and GLFSRs. ITC 2005: 10
116		Dhiraj K. Pradhan, Magdy S. Abadir, Mauricio Varea: Recent Advances in Verification, Equivalence Checking and SAT-Solvers. VLSI Design 2005: 14
115		Dhiraj K. Pradhan, Chunsheng Liu: EBIST: a novel test generator with built-in fault detection capability. IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1457-1466 (2005)
	2004
114		Subhasis Bhattacharjee, Dhiraj K. Pradhan: LPRAM: a low power DRAM with testability. ASP-DAC 2004: 390-393
113		Abusaleh M. Jabir, Dhiraj K. Pradhan: MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions. DATE 2004: 1388-1389
112		Chunsheng Liu, Hamid Sharif, Érika F. Cota, Dhiraj K. Pradhan: Test Scheduling for Network-on-Chip with BIST and Precedence Constraints. ITC 2004: 1369-1378
111		Sathiamoorthy Subbarayan, Dhiraj K. Pradhan: NiVER: Non Increasing Variable Elimination Resolution for Preprocessing SAT instances. SAT 2004
110		Sathiamoorthy Subbarayan, Dhiraj K. Pradhan: NiVER: Non-increasing Variable Elimination Resolution for Preprocessing SAT Instances. SAT (Selected Papers 2004: 276-291
109		Subhasis Bhattacharjee, Dhiraj K. Pradhan: LPRAM: a novel low-power high-performance RAM design with testability and scalability. IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 637-651 (2004)
	2003
108		Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty: EBIST: A Novel Test Generator with Built-In Fault Detection Capability. DATE 2003: 10224-10229
107		Elango Ganesan, Dhiraj K. Pradhan: Wormhole routing in de Bruijn networks and hyper-de Bruijn networks. ISCAS (3) 2003: 870-873
106		Mitrajit Chatterjee, Dhiraj K. Pradhan: A BIST Pattern Generator Design for Near-Perfect Fault Coverage. IEEE Trans. Computers 52(12): 1543-1558 (2003)
	2001
105		Dhiraj K. Pradhan: Logic Insertion to Speed-Up Logic Verification: A Recent Development. IOLTW 2001: 61-64
104		Magdy S. Abadir, Scott Davidson, Vijay Nagasamy, Dhiraj K. Pradhan, Prab Varma: ATPG for Design Errors-Is It Possible? VTS 2001: 283-285
	2000
103		Mitrajit Chatterjee, Savita Banerjee, Dhiraj K. Pradhan: Buffer Assignment Algorithms on Data Driven ASICs. IEEE Trans. Computers 49(1): 16-32 (2000)
102		Debjyoti Paul, Mitrajit Chatterjee, Dhiraj K. Pradhan: VERILAT: verification using logic augmentation and transformations. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 1041-1051 (2000)
	1999
101		Dhiraj K. Pradhan, Mitrajit Chatterjee: GLFSR-a new test pattern generator for built-in-self-test. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 238-247 (1999)
	1998
100		Debendra Das Sharma, Dhiraj K. Pradhan: Job Scheduling in Mesh Multicomputers. IEEE Trans. Parallel Distrib. Syst. 9(1): 57-70 (1998)
99		Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz: LOT: Logic Optimization with Testability. New transformations for logic synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 17(5): 386-399 (1998)
	1997
98		Bikram S. Bakshi, P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan: Improving Performance of TCP over Wireless Networks. ICDCS 1997: 0-
97		Dhiraj K. Pradhan, Nitin H. Vaidya: Roll-Forward and Rollback Recovery: Performance-Reliability Trade-Off. IEEE Trans. Computers 46(3): 372-378 (1997)
	1996
96		Dhiraj K. Pradhan, P. Krishna, Nitin H. Vaidya: Recoverable Mobile Environment: Design and Trade-Off Analysis. FTCS 1996: 16-25
95		Wanlin Cao, Dhiraj K. Pradhan: Sequential redundancy identification using recursive learning. ICCAD 1996: 56-62
94		Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee: VERILAT: verification using logic augmentation and transformations. ICCAD 1996: 88-95
93		Dhiraj K. Pradhan, Mitrajit Chatterjee, Madhu V. Swarna, Wolfgang Kunz: Gate-level synthesis for low-power using new transformations. ISLPED 1996: 297-300
92		Bikram S. Bakshi, P. Krishna, Dhiraj K. Pradhan, Nitin H. Vaidya: Providing Seamless Communication in Mobile Wireless Networks. LCN 1996: 535-543
91		P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan: Static and adaptive location management in mobile wireless networks. Computer Communications 19(4): 321-334 (1996)
90		Shlomi Dolev, Dhiraj K. Pradhan, Jennifer L. Welch: Modified tree structure for location management in mobile environments. Computer Communications 19(4): 335-345 (1996)
89		Sandeep K. Gupta, Dhiraj K. Pradhan: Utilization of On-Line (Concurrent) Checkers During Built-In-Self-Test and Vice Versa. IEEE Trans. Computers 45(1): 63-73 (1996)
88		Nicholas S. Bowen, Dhiraj K. Pradhan: The Effect of Program Behavior on Fault Observability. IEEE Trans. Computers 45(8): 868-880 (1996)
87		Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan: Synthesis of initializable asynchronous circuits. IEEE Trans. VLSI Syst. 4(2): 254-263 (1996)
86		Wolfgang Kunz, Dhiraj K. Pradhan, Sudhakar M. Reddy: A novel framework for logic verification in a synthesis environment. IEEE Trans. on CAD of Integrated Circuits and Systems 15(1): 20-32 (1996)
85		Debendra Das Sharma, Dhiraj K. Pradhan: Submesh Allocation in Mesh Multicomputers Using Busy-List: A BestFit Approach with Complete Recognition Capability. J. Parallel Distrib. Comput. 36(2): 106-118 (1996)
	1995
84		Subodh M. Reddy, Wolfgang Kunz, Dhiraj K. Pradhan: Novel Verification Framework Combining Structural and OBDD Methods in a Synthesis Environment. DAC 1995: 414-419
83		Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz: LOT: logic optimization with testability-new transformations using recursive learning. ICCAD 1995: 318-325
82		Shlomi Dolev, Dhiraj K. Pradhan, Jennifer L. Welch: Modified Tree Structure for Location Management in Mobile Environments. INFOCOM 1995: 530-537
81		P. Krishna, Mainak Chatterjee, Nitin H. Vaidya, Dhiraj K. Pradhan: A Cluster-based Approach for Routing in Ad-Hoc Networks. Symposium on Mobile and Location-Independent Computing 1995: 1-10
80		Mitrajit Chatterjee, Dhiraj K. Pradhan: A novel pattern generator for near-perfect fault-coverage. VTS 1995: 417-425
79		Jeffrey A. Clark, Dhiraj K. Pradhan: Fault Injection: A Method for Validating Computer-System Dependability. IEEE Computer 28(6): 47-56 (1995)
78		Nicholas S. Bowen, Dhiraj K. Pradhan: A Fault Tolerant Hybrid Memory Structure and Memory Management Algorithms. IEEE Trans. Computers 44(3): 408-418 (1995)
77		Debendra Das Sharma, Dhiraj K. Pradhan: Processor Allocation in Hypercube Multicomputers: Fast and Efficient Strategies for Cubic and Noncubic Allocation. IEEE Trans. Parallel Distrib. Syst. 6(10): 1108-1122 (1995)
76		Dhiraj K. Pradhan, Jayashree Saxena: A novel scheme to reduce test application time in circuits with full scan. IEEE Trans. on CAD of Integrated Circuits and Systems 14(12): 1577-1586 (1995)
	1994
75		Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar, Dhiraj K. Pradhan: Signal Transition Graph Transformations for Initializability. EDAC-ETC-EUROASIC 1994: 670
74		Dhiraj K. Pradhan, Nitin H. Vaidya: Roll-Forward and Rollback Recovery: Performance-Reliability Trade-Off. FTCS 1994: 186-195
73		Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar, Dhiraj K. Pradhan: Initialization Isuues in the Synthesis of Asynchronous Circuits. ICCD 1994: 447-452
72		Debendra Das Sharma, G. D. Holland, Dhiraj K. Pradhan: Subcube Level Time-Sharing in Hypercube Multicomputers. ICPP 1994: 134-142
71		P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan: Recovery in Multicomputers with Finite Error Detection Latency. ICPP 1994: 206-210
70		Debendra Das Sharma, Dhiraj K. Pradhan: Job Scheduling in Mesh Multicomputers. ICPP 1994: 251-258
69		Barun K. Kar, Khadem M. Yusuf, Dhiraj K. Pradhan: Bit-Serial Generalized Median Filters. ISCAS 1994: 85-88
68		Dhiraj K. Pradhan, Mitrajit Chatterjee: GLFSR - A New Test Pattern Generator for Built-In Self-Test. ITC 1994: 481-490
67		P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan: Location Management in Distributed Mobile Environments. PDIS 1994: 81-88
66		Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan: Synthesis of Initializable Asynchronous Circuits. VLSI Design 1994: 383-388
65		Dhiraj K. Pradhan, Nitin H. Vaidya: Roll-Forward Checkpointing Scheme: A Novel Fault-Tolerant Architecture. IEEE Trans. Computers 43(10): 1163-1174 (1994)
64		Nitin H. Vaidya, Dhiraj K. Pradhan: Safe System Level Diagnosis. IEEE Trans. Computers 43(3): 367-370 (1994)
63		Wolfgang Kunz, Dhiraj K. Pradhan: Recursive learning: a new implication technique for efficient solutions to CAD problems-test, verification, and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 13(9): 1143-1158 (1994)
	1993
62		Dhiraj K. Pradhan, Debendra Das Sharma, Nitin H. Vaidya: Roll-Forward Checkpointing Schemes. Hardware and Software Architectures for Fault Tolerance 1993: 95-116
61		Dhiraj K. Pradhan, Mitrajit Chatterjee, Savita Banerjee: Buffer assignment for data driven architectures. ICCAD 1993: 665-668
60		Jayashree Saxena, Dhiraj K. Pradhan: Desgin for Testability of Asynchronous Sequential Circuits. ICCD 1993: 518-522
59		Nitin H. Vaidya, Dhiraj K. Pradhan: Degradable Agreement in the Presence of Byzantine Faults. ICDCS 1993: 237-244
58		Debendra Das Sharma, Dhiraj K. Pradhan: Fast and Efficient Strategies for Cubic and Non-Cubic Allocation in Hypercube Multiprocessors. ICPP 1993: 118-127
57		Elango Ganesan, Dhiraj K. Pradhan: Optimal Broadcasting in Binary de Bruijn Networks and Hyper-de Bruijn Networks. IPPS 1993: 655-660
56		Jayashree Saxena, Dhiraj K. Pradhan: A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits. ITC 1993: 724-733
55		Debendra Das Sharma, Dhiraj K. Pradhan: A Fast and Efficient Strategy for Submesh Allocation in Mesh-Connected Parallel Computers. SPDP 1993: 682-689
54		Barun K. Kar, Dhiraj K. Pradhan: Scalability of Binary deBruijn Networks. SPDP 1993: 796-799
53		Nicholas S. Bowen, Dhiraj K. Pradhan: Processor- and Memory-Based Checkpoint and Rollback Recovery. IEEE Computer 26(2): 22-31 (1993)
52		Abraham Mendelson, Dominique Thiébaut, Dhiraj K. Pradhan: Modeling Live and Dead Lines in Cache Memory Systems. IEEE Trans. Computers 42(1): 1-14 (1993)
51		Nitin H. Vaidya, Dhiraj K. Pradhan: Fault-Tolerant Design Strategies for High Reliability and Safety. IEEE Trans. Computers 42(10): 1195-1206 (1993)
50		Elango Ganesan, Dhiraj K. Pradhan: The Hyper-deBruijn Networks: Scalable Versatile Architecture. IEEE Trans. Parallel Distrib. Syst. 4(9): 962-978 (1993)
49		D. D. Sharma, Fred J. Meyer, Dhiraj K. Pradhan: Yield optimization of modular and redundant multimegabit RAMs: a study of effectiveness of coding versus static redundancy using the center-satellite model. IEEE Trans. VLSI Syst. 1(4): 546-558 (1993)
48		Wolfgang Kunz, Dhiraj K. Pradhan: Accelerated dynamic learning for test pattern generation in combinational circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 684-694 (1993)
47		Barun K. Kar, Dhiraj K. Pradhan: A new algorithm for order statistic and sorting. IEEE Transactions on Signal Processing 41(8): 2688-2694 (1993)
	1992
46		Yeong-Chang Maa, Dhiraj K. Pradhan, Dominique Thiébaut: A Hierarchical Directory Scheme for Large-Scale Cache-Coherent Multipmcessors. IPPS 1992: 43-46
45		Sandeep K. Gupta, Dhiraj K. Pradhan: Can Concurrent Checkers Help BIST? ITC 1992: 140-150
44		Wolfgang Kunz, Dhiraj K. Pradhan: Recursive Learning: An Attractive Alternative to the Decision Tree for Test Genration in Digital Circuits. ITC 1992: 816-825
43		Debendra Das Sharma, Dhiraj K. Pradhan: A Novel Approach for Subcube Allocation in Hypercube Multiprocessors. SPDP 1992: 336-345
42		Nicholas S. Bowen, Dhiraj K. Pradhan: Virtual Checkpoints: Architecture and Performance. IEEE Trans. Computers 41(5): 516-525 (1992)
41		Nitin H. Vaidya, Dhiraj K. Pradhan: A new class of bit- and byte-error control codes. IEEE Transactions on Information Theory 38(5): 1617-1623 (1992)
	1991
40		Nicholas S. Bowen, Dhiraj K. Pradhan: Program Fault Tolerance Based on Memory Access Behavior. FTCS 1991: 426-435
39		Nitin H. Vaidya, Dhiraj K. Pradhan: System Level Diagnosis: Combining Detection and Location. FTCS 1991: 488-495
38		Elango Ganesan, Dhiraj K. Pradhan: The hyper-deBruijn multiprocessor networks. ICDCS 1991: 492-499
37		Mark G. Karpovsky, Sandeep K. Gupta, Dhiraj K. Pradhan: Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model. ITC 1991: 828-839
36		Nicholas S. Bowen, Dhiraj K. Pradhan: A virtual memory translation mechanism to support checkpoint and rollback recovery. SC 1991: 890-899
35		Neeraj Suri, Avi Mendelson, Dhiraj K. Pradhan: BDG-torus union graph-an efficient algorithmically specializedparallel interconnect. SPDP 1991: 407-414
34		Dhiraj K. Pradhan, Sandeep K. Gupta: A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression. IEEE Trans. Computers 40(6): 743-763 (1991)
33		Fred J. Meyer, Dhiraj K. Pradhan: Consensus With Dual Failure Modes. IEEE Trans. Parallel Distrib. Syst. 2(2): 214-222 (1991)
	1990
32		Sandeep K. Gupta, Dhiraj K. Pradhan, Sudhakar M. Reddy: Zero aliasing compression. FTCS 1990: 254-263
31		Abraham Mendelson, Dominique Thiébaut, Dhiraj K. Pradhan: Modeling of Live Lines and True Sharing in Multi-Cache Memory Systems. ICPP (1) 1990: 326-330
30		Eiji Fujiwara, Dhiraj K. Pradhan: Error-Control Coding in Computers. IEEE Computer 23(7): 63-72 (1990)
29		Kifung C. Cheung, Gurindar S. Sohi, Kewal K. Saluja, Dhiraj K. Pradhan: Design and Analysis of a Gracefully Degrading Interleaved Memory System. IEEE Trans. Computers 39(1): 63-71 (1990)
28		Dhiraj K. Pradhan, Sandeep K. Gupta, Mark G. Karpovsky: Aliasing Probability for Multiple Input Signature Analyzer. IEEE Trans. Computers 39(4): 586-591 (1990)
	1989
27		Fred J. Meyer, Dhiraj K. Pradhan: Dynamic Testing Strategy for Distributed Systems. IEEE Trans. Computers 38(3): 356-365 (1989)
26		Fred J. Meyer, Dhiraj K. Pradhan: Modeling Defect Spatial Distribution. IEEE Trans. Computers 38(4): 538-546 (1989)
25		Maheswara R. Samatham, Dhiraj K. Pradhan: The De Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI. IEEE Trans. Computers 38(4): 567-581 (1989)
	1988
24		Dhiraj K. Pradhan, Nirmala R. Kamath: RTRAM: Reconfigurable and Testable Multi-Bit RAM Design. ITC 1988: 263-278
23		Sandeep K. Gupta, Dhiraj K. Pradhan: A New Framework for Designing and Analyzing BIST Techniques: Computation of Exact Aliasing Probability. ITC 1988: 329-342
22		Najmi T. Jarwala, Dhiraj K. Pradhan: TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAM's. IEEE Trans. Computers 37(10): 1235-1250 (1988)
21		Fred J. Meyer, Dhiraj K. Pradhan: Flip-Trees: Fault-Tolerant Graphs with Wide Containers. IEEE Trans. Computers 37(4): 472-478 (1988)
	1987
20		Kifung C. Cheung, Gurindar S. Sohi, Kewal K. Saluja, Dhiraj K. Pradhan: Organization and Analysis of a Gracefully-Degrading Interleaved Memory System. ISCA 1987: 224-231
19		Israel Koren, Dhiraj K. Pradhan: Modeling the Effect of Redundancy on Yield and Performance of VLSI Systems. IEEE Trans. Computers 36(3): 344-355 (1987)
	1985
18		Maheswara R. Samatham, Dhiraj K. Pradhan: The de Bruijn Multiprocessor Network: A Versatile Sorting Network. ISCA 1985: 360-367
17		Dhiraj K. Pradhan: Dynamically Restructurable Fault-Tolerant Processor Network Architectures. IEEE Trans. Computers 34(5): 434-447 (1985)
	1983
16		Dhiraj K. Pradhan: Sequential Network Design Using Extra Inputs for Fault Detection. IEEE Trans. Computers 32(3): 319-323 (1983)
	1982
15		Dhiraj K. Pradhan: On a Class of Fault-Tolerant Multiprocessor Network Architectures. ICDCS 1982: 302-311
14		Bella Bose, Dhiraj K. Pradhan: Optimal Unidirectional Error Detecting/Correcting Codes. IEEE Trans. Computers 31(6): 564-568 (1982)
13		Dhiraj K. Pradhan, Sudhakar M. Reddy: A Fault-Tolerant Communication Architecture for Distributed Systems. IEEE Trans. Computers 31(9): 863-870 (1982)
	1981
12		Kyushik Son, Dhiraj K. Pradhan: Completely Self-Checking Checkers in PLAs. ITC 1981: 231-240
	1980
11		Kolar L. Kodandapani, Dhiraj K. Pradhan: Undetectability of Bridging Faults and Validity of Stuck-At Fault Test Sets. IEEE Trans. Computers 29(1): 55-59 (1980)
10		Dhiraj K. Pradhan: A New Class of Error-Correcting/Detecting Codes for Fault-Tolerant Computer Applications. IEEE Trans. Computers 29(6): 471-481 (1980)
9		Dhiraj K. Pradhan, Kolar L. Kodandapani: A Uniform Representation of Single- and Multistage Interconnection Networks Used in SIMD Machines. IEEE Trans. Computers 29(9): 777-791 (1980)
	1978
8		Dhiraj K. Pradhan: Universal Test Sets for Multiple Fault Detection in AND-EXOR Arrays. IEEE Trans. Computers 27(2): 181-187 (1978)
7		Dhiraj K. Pradhan: A Theory of Galois Switching Functions. IEEE Trans. Computers 27(3): 239-248 (1978)
6		Dhiraj K. Pradhan: Asynchronous State Assignments with Unateness Properties and Fault-Secure Design. IEEE Trans. Computers 27(5): 396-404 (1978)
5		Dhiraj K. Pradhan: Fault-Tolerant Asynchronous Networks Using Read-Only Memories. IEEE Trans. Computers 27(7): 674-679 (1978)
	1977
4		M. Y. Hsiao, Arvind M. Patel, Dhiraj K. Pradhan: Store Address Generator with On-Line Fault-Detection Capability. IEEE Trans. Computers 26(11): 1144-1151 (1977)
3		L. C. Chang, Dhiraj K. Pradhan: A graph-structural approach for the generalization of data management systems. Inf. Sci. 12(1): 1-18 (1977)
	1976
2		Dhiraj K. Pradhan, Sudhakar M. Reddy: Techniques to Construct (2, 1) Separating Systems from Linear Error-Correcting Codes. IEEE Trans. Computers 25(9): 945-949 (1976)
	1975
1		Dhiraj K. Pradhan, Arvind M. Patel: Reed-Muller Like Canonic Forms for Multivalued Functions. IEEE Trans. Computers 24(2): 206-210 (1975)

Coauthor Index

1	Magdy S. Abadir	[104] [116]
2	Ahmad A. Al-Yamani	[128] [130] [168]
3	Costas Argyrides	[126] [128] [129] [132] [134] [137] [139] [141] [149] [152] [157] [162] [167] [168] [170] [182] [187] [190] [192] [194]
4	Dilip S. Aswar	[186]
5	Bikram S. Bakshi	[92] [98]
6	Florin Balasa	[143]
7	S. Banerjee	[196]
8	Savita Banerjee	[61] [66] [73] [75] [87] [103] [179] [183]
9	Shibaji Banerjee	[189] [195]
10	Subhasis Bhattacharjee	[109] [114]
11	Bhargab B. Bhattacharya	[195]
12	Bella Bose	[14]
13	Nicholas S. Bowen	[36] [40] [42] [53] [78] [88]
14	Wanlin Cao	[95]
15	Luigi Carro	[129] [149] [167] [168] [170]
16	Krishnendu Chakrabarty	[108]
17	Srimat T. Chakradhar	[66] [73] [75] [87]
18	L. C. Chang	[3]
19	Mainak Chatterjee	[81]
20	Mitrajit Chatterjee	[61] [68] [80] [83] [93] [94] [99] [101] [102] [103] [106]
21	Donny Cheung	[153] [164]
22	Kifung C. Cheung	[20] [29]
23	S. Chidambaram	[117]
24	Raul Chipana	[192]
25	Maciej J. Ciesielski	[189] [196]
26	Jeffrey A. Clark	[79]
27	Érika F. Cota	[112]
28	Scott Davidson	[104]
29	Giorgos Dimosthenous	[167]
30	Shlomi Dolev	[82] [90]
31	Eiji Fujiwara	[30]
32	Rohit Gambhir	[118]
33	Elango Ganesan	[38] [50] [57] [107]
34	Dhruva Ghai	[180] [185] [188]
35	Sandeep K. Gupta	[23] [28] [32] [34] [37] [45] [89]
36	G. D. Holland	[72]
37	Simon Hollis	[171]
38	Mohammad Hosseinabady	[140] [159] [163] [193]
39	M. Y. Hsiao	[4]
40	Vikram Iyengar	[119]
41	Abusaleh M. Jabir	[113] [120] [122] [123] [145] [146] [147] [150] [152] [159] [161] [165] [169] [175] [176] [179] [184] [197] [198]
42	Najmi T. Jarwala	[22]
43	Babita R. Jose	[127] [151]
44	Bharat Joshi	[148]
45	Dimitrios Kagaris (Dimitri Kagaris)	[117] [118] [144]
46	Jayawant Kakade	[144]
47	Mohammad Reza Kakoee	[163] [193]
48	Nirmala R. Kamath	[24]
49	Barun K. Kar	[47] [54] [69]
50	Mark G. Karpovsky	[28] [37]
51	Taskin Koçak	[173] [194]
52	Kolar L. Kodandapani	[9] [11]
53	Israel Koren	[19]
54	Elias Kougianos	[142] [174] [199]
55	P. Krishna	[67] [71] [81] [91] [92] [96] [98]
56	Wolfgang Kunz	[44] [48] [63] [83] [84] [86] [93] [99]
57	Zach Link	[121]
58	Carlos Arthur Lang Lisbôa	[129] [149] [167] [168] [170]
59	Chunsheng Liu	[108] [112] [115] [119] [121]
60	Stephania Loizidou	[157]
61	Ilie I. Luican	[143]
62	Yeong-Chang Maa	[46]
63	Juan Antonio Maestro	[190]
64	K. Maharatna	[135]
65	Dmitri Maslov	[153] [164]
66	Jimson Mathew	[120] [124] [125] [127] [131] [133] [135] [136] [138] [140] [145] [146] [147] [150] [151] [152] [153] [154] [155] [156] [158] [159] [160] [161] [163] [164] [165] [166] [169] [171] [175] [176] [177] [178] [179] [181] [183] [184] [189] [191] [193] [195] [196] [197] [198] [200]
67	Nikolaos Mavrogiannakis	[182] [187]
68	Abraham Mendelson	[31] [52]
69	Avi Mendelson	[35]
70	Fred J. Meyer	[21] [26] [27] [33] [49]
71	Seyed Ghassem Miremadi	[131] [132] [133] [136] [137]
72	Vishram Mishra	[191]
73	Saraju P. Mohanty	[142] [154] [155] [158] [166] [171] [172] [174] [179] [180] [183] [184] [185] [186] [188] [189] [195] [196] [197] [199] [200]
74	Marlon Moraes	[162]
75	P. Mythili	[127]
76	Vijay Nagasamy	[104]
77	José L. Núñez-Yáñez (Jose Luis Nunez-Yanez)	[135]
78	Arvind M. Patel	[1] [4]
79	Debjyoti Paul	[94] [102]
80	Mahesh Poolakkaparambil	[197] [198]
81	Hafizur Rahaman	[124] [125] [138] [146] [147] [150] [151] [152] [165] [169] [175] [176] [177] [178] [179] [184]
82	T. L. Rajaprabhu	[122]
83	S. Ramsundar	[130]
84	Subodh M. Reddy	[84]
85	Sudhakar M. Reddy	[2] [13] [32] [86]
86	Pedro Reviriego	[190]
87	Rabindra K. Roy	[66] [73] [75] [87]
88	Kewal K. Saluja	[20] [29]
89	Maheswara R. Samatham	[18] [25]
90	Jayashree Saxena	[56] [60] [76]
91	Rishad Ahmed Shafik (Rishad A. Shafik)	[200]
92	Hamid Sharif	[112]
93	D. D. Sharma	[49]
94	Debendra Das Sharma	[43] [55] [58] [62] [70] [72] [77] [85] [100]
95	Biplab K. Sikdar (Biplab Kumar Sikdar)	[124]
96	Ashutosh Kumar Singh	[122] [150] [176]
97	Jawar Singh	[140] [154] [155] [156] [158] [159] [160] [166] [171] [186] [199]
98	Gurindar S. Sohi	[20] [29]
99	Kyushik Son	[12]
100	R. Stapenhurst	[135]
101	Jack Stiffler	[148]
102	Yi Xin Su	[156]
103	Sathiamoorthy Subbarayan	[110] [111]
104	Neeraj Suri	[35]
105	Madhu V. Swarna	[93]
106	Anas Abu Taleb	[160] [181]
107	Garima Thakral	[174] [180] [185] [188]
108	Dominique Thiébaut	[31] [46] [52]
109	Nitin H. Vaidya	[39] [41] [51] [59] [62] [64] [65] [67] [71] [74] [81] [91] [92] [96] [97] [98]
110	Mauricio Varea	[116]
111	Fabian Vargas	[162] [192]
112	Prab Varma	[104]
113	Jennifer L. Welch	[82] [90]
114	Pranav Yeolekar	[200]
115	Khadem M. Yusuf	[69]
116	Hamid R. Zarandi	[131] [132] [133] [134] [136] [137] [141]
117	Hongwei Zhu	[143]

Colors in the list of coauthors

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