| 2009 | ||
|---|---|---|
| 27 | Josep Torrellas, Luis Ceze, James Tuck, Calin Cascaval, Pablo Montesinos, Wonsun Ahn, Milos Prvulovic: The Bulk Multicore architecture for improved programmability. Commun. ACM 52(12): 58-65 (2009) | |
| 26 | Siddhartha Chhabra, Brian Rogers, Yan Solihin, Milos Prvulovic: Making secure processors OS- and performance-friendly. TACO 5(4): (2009) | |
| 25 | Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic: MemTracker: An accelerator for memory debugging and monitoring. TACO 6(2): (2009) | |
| 2008 | ||
| 24 | Samantika Subramaniam, Milos Prvulovic, Gabriel H. Loh: PEEP: Exploiting predictability of memory dependences in SMT processors. HPCA 2008: 137-148 | |
| 23 | Brian Rogers, Chenyu Yan, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin: Single-level integrity and confidentiality protection for distributed shared memory multiprocessors. HPCA 2008: 161-172 | |
| 22 | Guru Venkataramani, Ioannis Doudalis, Yan Solihin, Milos Prvulovic: FlexiTaint: A programmable accelerator for dynamic taint propagation. HPCA 2008: 173-184 | |
| 2007 | ||
| 21 | James A. Clause, Ioannis Doudalis, Alessandro Orso, Milos Prvulovic: Effective memory protection using dynamic tainting. ASE 2007: 284-292 | |
| 20 | Guru Venkataramani, Brandyn Roemer, Yan Solihin, Milos Prvulovic: MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging. HPCA 2007: 273-284 | |
| 19 | Brian Rogers, Siddhartha Chhabra, Milos Prvulovic, Yan Solihin: Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly. MICRO 2007: 183-196 | |
| 2006 | ||
| 18 | Jianli Shen, Guru Venkataramani, Milos Prvulovic: Tradeoffs in fine-grained heap memory protection. ASID 2006: 52-57 | |
| 17 | Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru Venkataramani, Milos Prvulovic: Comprehensively and efficiently protecting the heap. ASPLOS 2006: 207-218 | |
| 16 | Milos Prvulovic: CORD: cost-effective (and nearly overhead-free) order-recording and data race detection. HPCA 2006: 232-243 | |
| 15 | Chenyu Yan, Daniel Englender, Milos Prvulovic, Brian Rogers, Yan Solihin: Improving Cost, Performance, and Security of Memory Encryption and Authentication. ISCA 2006: 179-190 | |
| 14 | Brian Rogers, Milos Prvulovic, Yan Solihin: Efficient data protection for distributed shared memory multiprocessors. PACT 2006: 84-94 | |
| 13 | Rithin Shetty, Mazen Kharbutli, Yan Solihin, Milos Prvulovic: HeapMon: A helper-thread approach to programmable, automatic, and low-overhead memory bug detection. IBM Journal of Research and Development 50(2-3): 261-276 (2006) | |
| 2005 | ||
| 12 | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, Milos Prvulovic: Synonymous address compaction for energy reduction in data TLB. ISLPED 2005: 357-362 | |
| 11 | Brian Rogers, Yan Solihin, Milos Prvulovic: Memory predecryption: hiding the latency overhead of memory encryption. SIGARCH Computer Architecture News 33(1): 27-33 (2005) | |
| 10 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. TACO 2(3): 247-279 (2005) | |
| 2003 | ||
| 9 | María Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. HPCA 2003: 191-202 | |
| 8 | María Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas: Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. IEEE PACT 2003: 170- | |
| 7 | Milos Prvulovic, Josep Torrellas: ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes. ISCA 2003: 110-121 | |
| 2002 | ||
| 6 | Francis H. Dang, María Jesús Garzarán, Milos Prvulovic, Ye Zhang, Alin Jula, Hao Yu, Nancy M. Amato, Lawrence Rauchwerger, Josep Torrellas: SmartApps: An Application Centric Approach to High Performance Computing: Compiler-Assisted Software and Hardware Support for Reduction Operations. IPDPS 2002 | |
| 5 | Milos Prvulovic, Josep Torrellas, Zheng Zhang: ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors. ISCA 2002: 111-122 | |
| 4 | José F. Martínez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas: Cherry: checkpointed early resource recycling in out-of-order microprocessors. MICRO 2002: 3-14 | |
| 2001 | ||
| 3 | María Jesús Garzarán, Milos Prvulovic, Ye Zhang, Josep Torrellas, Alin Jula, Hao Yu, Lawrence Rauchwerger: Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors. IEEE PACT 2001: 243- | |
| 2 | Sumit Roy, Raj Kumar, Milos Prvulovic: Improving System Performance with Compressed Memory. IPDPS 2001: 66 | |
| 1 | Milos Prvulovic, María Jesús Garzarán, Lawrence Rauchwerger, Josep Torrellas: Removing architectural bottlenecks to the scalability of speculative parallelization. ISCA 2001: 204-215 | |