| 2008 |
|---|
| 27 | EE | Wei-Ngan Chin,
Huu Hai Nguyen,
Corneliu Popeea,
Shengchao Qin:
Analysing memory resource bounds for low-level programs.
ISMM 2008: 151-160 |
| 26 | EE | Wei-Ngan Chin,
Cristina David,
Huu Hai Nguyen,
Shengchao Qin:
Enhancing modular OO verification with separation logic.
POPL 2008: 87-99 |
| 25 | EE | Chenguang Luo,
Shengchao Qin:
Separation Logic for Multiple Inheritance.
Electr. Notes Theor. Comput. Sci. 212: 27-40 (2008) |
| 2007 |
|---|
| 24 | EE | Wei-Ngan Chin,
Cristina David,
Huu Hai Nguyen,
Shengchao Qin:
Multiple Pre/Post Specifications for Heap-Manipulating Methods.
HASE 2007: 357-364 |
| 23 | EE | Shengchao Qin,
Guanhua He:
Linking Object-Z with Spec#.
ICECCS 2007: 185-196 |
| 22 | EE | Wei-Ngan Chin,
Cristina David,
Huu Hai Nguyen,
Shengchao Qin:
Automated Verification of Shape, Size and Bag Properties.
ICECCS 2007: 307-320 |
| 21 | EE | Hai H. Wang,
Shengchao Qin,
Jun Sun,
Jin Song Dong:
Realizing Live Sequence Charts in SystemVerilog.
TASE 2007: 379-388 |
| 20 | EE | Huu Hai Nguyen,
Cristina David,
Shengchao Qin,
Wei-Ngan Chin:
Automated Verification of Shape and Size Properties Via Separation Logic.
VMCAI 2007: 251-266 |
| 2006 |
|---|
| 19 | EE | Jin Song Dong,
Ping Hao,
Xian Zhang,
Shengchao Qin:
HighSpec: a tool for building and checking OZTA models.
ICSE 2006: 775-778 |
| 18 | EE | Huibiao Zhu,
Shengchao Qin,
Jifeng He,
Jonathan P. Bowen:
Integrating Probability with Time and Shared-Variable Concurrency.
SEW 2006: 179-189 |
| 17 | EE | Jifeng He,
Shengchao Qin,
Adnan Sherif:
Constructing Property-Oriented Models for Verification.
UTP 2006: 85-100 |
| 16 | EE | Shengchao Qin,
Wei-Ngan Chin,
Jifeng He,
Zongyan Qiu:
From Statecharts to Verilog: a formal approach to hardware/software co-specification.
ISSE 2(1): 17-38 (2006) |
| 2005 |
|---|
| 15 | EE | Jin Song Dong,
Ping Hao,
Shengchao Qin,
Xian Zhang:
The Semantics and Tool Support of OZTA.
ICFEM 2005: 66-80 |
| 14 | EE | Wei-Ngan Chin,
Siau-Cheng Khoo,
Shengchao Qin,
Corneliu Popeea,
Huu Hai Nguyen:
Verifying safety policies with size properties and alias controls.
ICSE 2005: 186-195 |
| 13 | EE | Wei-Ngan Chin,
Huu Hai Nguyen,
Shengchao Qin,
Martin C. Rinard:
Memory Usage Verification for OO Programs.
SAS 2005: 70-86 |
| 2004 |
|---|
| 12 | EE | Jifeng He,
Zhiming Liu,
Xiaoshan Li,
Shengchao Qin:
A Relational Model for Object-Oriented Designs.
APLAS 2004: 415-436 |
| 11 | EE | Jin Song Dong,
Ping Hao,
Shengchao Qin,
Jun Sun,
Wang Yi:
Timed Patterns: TCOZ to Timed Automata.
ICFEM 2004: 483-498 |
| 10 | EE | Viet-Anh Vu Tran,
Shengchao Qin,
Wei-Ngan Chin:
An Automatic Mapping from Statecharts to Verilog.
ICTAC 2004: 187-203 |
| 9 | EE | Jin Song Dong,
Shengchao Qin,
Jun Sun:
Generating MSCs from an Integrated Formal Specification Language.
IFM 2004: 168-186 |
| 8 | EE | Wei-Ngan Chin,
Florin Craciun,
Shengchao Qin,
Martin C. Rinard:
Region inference for an object-oriented language.
PLDI 2004: 243-254 |
| 2003 |
|---|
| 7 | EE | Shengchao Qin,
Wei-Ngan Chin:
Mapping Statecharts to Verilog for Hardware/Software Co-specification.
FME 2003: 282-300 |
| 6 | EE | Shengchao Qin,
Jin Song Dong,
Wei-Ngan Chin:
A Semantic Foundation for TCOZ in Unifying Theories of Programming.
FME 2003: 321-340 |
| 5 | EE | Quan Long,
Zongyan Qiu,
Shengchao Qin:
The Equivalence of Statecharts.
ICFEM 2003: 125-143 |
| 2002 |
|---|
| 4 | EE | Shengchao Qin,
Jifeng He,
Zongyan Qiu,
Naixiao Zhang:
Hardware/Software Partitioning in Verilog.
ICFEM 2002: 168-179 |
| 3 | EE | Shengchao Qin,
Jifeng He,
Zongyan Qiu,
Naixiao Zhang:
An Algebraic Hardware/Software Partitioning Algorithm.
J. Comput. Sci. Technol. 17(3): 284-294 (2002) |
| 2001 |
|---|
| 2 | EE | Shengchao Qin,
Zongyan Qiu,
Jifeng He:
Constructing Hardware/Software Interface Using Protocol Converters.
APAQS 2001: 141-148 |
| 1 | EE | Shengchao Qin,
Jifeng He:
Partitioning Program into Hardware and Software.
APSEC 2001: 309-316 |
