Ivan Radojevic Coauthor index DBLP Vis pubzone.org

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DBLP keys2007
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIvan Radojevic, Zoran A. Salcic, Partha S. Roop: McCharts and Multiclock FSMs for modeling large scale systems. MEMOCODE 2007: 3-12
2006
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFlavius Gruian, Partha S. Roop, Zoran A. Salcic, Ivan Radojevic: The SystemJ approach to system-level design. MEMOCODE 2006: 149-158
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIvan Radojevic, Zoran A. Salcic, Partha S. Roop: Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation. VLSI Design 2006: 461-464
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIvan Radojevic, Zoran A. Salcic, Partha S. Roop: Modeling Embedded Systems: From SystemC and Esterel to DFCharts. IEEE Design & Test of Computers 23(5): 348-358 (2006)
2005
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIvan Radojevic, Zoran A. Salcic, Partha S. Roop: Modelling Heterogeneous Embedded Systems in DFCarts. FDL 2005: 441-453
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIvan Radojevic, Zoran A. Salcic, Partha S. Roop: A New Model for Heterogeneous Embedded Systems - What Esterel and SyncCharts Need to Become a Suitable Specification Platform. International Journal of Software Engineering and Knowledge Engineering 15(2): 405-410 (2005)
2004
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZoran A. Salcic, Partha S. Roop, Dong Hui, Ivan Radojevic: HiDRA: A New Architecture for Heterogeneous Embedded Systems. ESA/VLSI 2004: 164-170

Coauthor Index

1Flavius Gruian [6]
2Dong Hui [1]
3Partha S. Roop [1] [2] [3] [4] [5] [6] [7]
4Zoran A. Salcic (Zoran Salcic) [1] [2] [3] [4] [5] [6] [7]

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