 | 1994 |
|---|
| 4 |       | G. Masseboeuf,
J. Pulou,
J. L. Rainard:
Hierarchical Test Analysis of VLSI Circuits for Random BIST.
EDCC 1994: 271-288 |
| 1991 |
|---|
| 3 |  | P. Thorel,
J. L. Rainard,
A. Botta,
A. Chemarin,
J. Majos:
Implementing Boundary-Scan and Pseudo-Random BIST in an Asynchronous Transfer Mode Switch.
ITC 1991: 131-139 |
| 1990 |
|---|
| 2 | | Rene David,
S. Rahal,
J. L. Rainard:
Some relationships between delay testing and stuck-open testing in CMOS circuits.
EURO-DAC 1990: 339-343 |
| 1987 |
|---|
| 1 | | Mireille Jacomino,
J. L. Rainard,
Rene David:
Fault Detection By Consumption Measurement in CMOS Circuits.
Fehlertolerierende Rechensysteme 1987: 83-94 |
