R. V. Raj

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1997

1 R. V. Raj, N. S. Murty, P. S. Nagendra Rao, Lalit M. Patnaik: Effective Heuristics for Timing Driven Constructive Placement. VLSI Design 1997: 38-45

	1997
1		R. V. Raj, N. S. Murty, P. S. Nagendra Rao, Lalit M. Patnaik: Effective Heuristics for Timing Driven Constructive Placement. VLSI Design 1997: 38-45

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