Chandrasekar Rajagopal

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2004

3 Chandrasekar Rajagopal, Adrián Núñez-Aldana: CMOS Analog Programmable Logic Array. ISVLSI 2004: 291-292

2003

2 Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nunez: RF CMOS circuit optimizing procedure and synthesis tool. ACM Great Lakes Symposium on VLSI 2003: 100-103

1993

1 Belur V. Sheela, Chandrasekar Rajagopal, K. Padmanabhan: TEMPO - template matching by parametric optimization. Pattern Recognition Letters 14(1): 65-69 (1993)

	2004
3		Chandrasekar Rajagopal, Adrián Núñez-Aldana: CMOS Analog Programmable Logic Array. ISVLSI 2004: 291-292
	2003
2		Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nunez: RF CMOS circuit optimizing procedure and synthesis tool. ACM Great Lakes Symposium on VLSI 2003: 100-103
	1993
1		Belur V. Sheela, Chandrasekar Rajagopal, K. Padmanabhan: TEMPO - template matching by parametric optimization. Pattern Recognition Letters 14(1): 65-69 (1993)

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