Ulrich Ramacher

	2007
25		Ulrich Ramacher: Challenges and prospects of SDR for mobile phones. ICCD 2007: 215
24		Ulrich Ramacher: Software-Defined Radio Prospects for Multistandard Mobile Phones. IEEE Computer 40(10): 62-69 (2007)
23		Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf: Roundtable: Envisioning the Future for Multiprocessor SoC. IEEE Design & Test of Computers 24(2): 174-183 (2007)
	2005
22		Francine Bacchini, Jan M. Rabaey, Allan Cox, Frank Lane, Rudy Lauwereins, Ulrich Ramacher, David Witt: Wireless platforms: GOPS for cents and MilliWatts. DAC 2005: 351-352
21		Werner Hemmert, Marcus Holmberg, Ulrich Ramacher: Temporal Sound Processing by Cochlear Nucleus Octopus Neurons. ICANN (1) 2005: 583-588
20		Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher: 3D Chip Stack Technology Using Through-Chip Interconnects. IEEE Design & Test of Computers 22(6): 512-518 (2005)
19		Joachim M. Buhmann, Tilman Lange, Ulrich Ramacher: Image Segmentation by Networks of Spiking Neurons. Neural Computation 17(5): 1010-1031 (2005)
	2004
18		Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny: Pulse coupled neural networks with adaptive synapses for image segmentation. ARCS Workshops 2004: 275-282
17		Wolfgang Raab, Hans-Martin Blüthgen, Ulrich Ramacher: A low-power memory hierarchy for a fully programmable baseband processor. WMPI 2004: 102-106
	2003
16		Wolfgang Raab, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Ulrich Ramacher, Christian Sauer, Axel Techmer: A 100-GOPS Programmable Processor for Vehicle Vision Systems. IEEE Design & Test of Computers 20(1): 8-16 (2003)
15		Ulrich Ramacher, Nico Brüls, J. A. Ulrich Hachmann, Jens Harnisch, Wolfgang Raab, Axel Techmer: 100 GOPS vision processor for automotive applications. SIGARCH Computer Architecture News 31(1): 60-68 (2003)
	2002
14		Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny: An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. ICANN 2002: 1293-1298
13		Ulrich Ramacher: Application Specific Embedded Processors for Next Generation Communication Systems. ICCD 2002
	2001
12		Chr. Werner, R. Göttsche, A. Wörner, Ulrich Ramacher: Crosstalk noise in future digital CMOS circuits. DATE 2001: 331-335
	1999
11		Ulrich Ramacher, Wolfgang Raab, Wolfgang Kabatzke: Prototyp eines Bildrechners für Echtzeitbildverarbeitung in Industrie- und Medientechnik. PEARL 1999: 102-110
	1996
10		Ulrich Ramacher: SEE-1 - A Vision System for Use in Real World Environments. ICANN 1996: 17
	1995
9		Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Joachim Gläß, Andreas Wurz, Reinhard Männer: SYNAPSE-1: a high-speed general purpose parallel neurocomputer system. IPPS 1995: 774-781
	1993
8		Ulrich Ramacher, Jörg Beichter, Nico Brüls, Elisabeth Sicheneder: Architecture and VLSI Design of a VLSI Neural Signal Processor. ISCAS 1993: 1975-1978
7		Ulrich Ramacher, Peter Schildberg: Recent Developments In Neurodynamics And Their Impact On The Design Of Neuro-Chips. Int. J. Neural Syst. 4(4): 309-316 (1993)
6		Ulrich Ramacher, Wolfgang Raab, Joachim K. Anlauf, J. A. Ulrich Hachmann, Jörg Beichter, Nico Brüls, Matthias Wesseling, Elisabeth Sicheneder, Reinhard Männer, Joachim Gläß, Andreas Wurz: Multiprocessor And Memory Architecture Of The Neurocomputer Synapse-1. Int. J. Neural Syst. 4(4): 333-336 (1993)
5		Ulrich Ramacher: Hamiltonian dynamics of neural networks. Neural Networks 6(4): 547-557 (1993)
4		Jörg Beichter, Nico Brüls, Elisabeth Sicheneder, Ulrich Ramacher, Heinrich Klar: Design of a general-purpose neural signal processor. Neurocomputing 5(1): 17-23 (1993)
3		Ulrich Ramacher, Jörg Beichter, Nico Brüls: A general-purpose signal processor architecture for neurocomputing and preprocessing applications. VLSI Signal Processing 6(1): 45-56 (1993)
	1992
2		Ulrich Ramacher: SYNAPSE - A Neurocomputer that Synthesizes Neural Algorithms on a Parallel Systolic Engine. J. Parallel Distrib. Comput. 14(3): 306-318 (1992)
	1989
1		Matthias Wesseling, Ulrich Ramacher, Karl Goser: Evaluation and Comparison of Selected WSI Reconfiguration Architectures in Terms of Yield and Yield per Area. Fehlertolerierende Rechensysteme 1989: 74-84

Coauthor Index

1	Joachim K. Anlauf	[6]
2	Francine Bacchini	[22]
3	Jörg Beichter	[3] [4] [6] [8] [9]
4	Peter Benkart	[20]
5	Hans-Martin Blüthgen	[17]
6	Nico Brüls	[3] [4] [6] [8] [9] [15] [16]
7	Markus Bschorr	[20]
8	Joachim M. Buhmann	[19]
9	Allan Cox	[22]
10	Olivier Franza	[23]
11	Joachim Gläß	[6] [9]
12	Karl Goser	[1]
13	R. Göttsche	[12]
14	J. A. Ulrich Hachmann	[6] [9] [15] [16]
15	Jens Harnisch	[15] [16]
16	Arne Heittmann	[14] [18] [20]
17	Werner Hemmert	[21]
18	Marcus Holmberg	[21]
19	Holger Huebner	[20]
20	Ahmed Amine Jerraya	[23]
21	Wolfgang Kabatzke	[11]
22	Alexander Kaiser	[20]
23	Heinrich Klar	[4]
24	Erhard Kohn	[20]
25	Frank Lane	[22]
26	Tilman Lange	[19]
27	Rudy Lauwereins	[22]
28	Markus Levy	[23]
29	Reinhard Männer	[6] [9]
30	Daniel Matolin	[14] [18]
31	Andreas Munding	[20]
32	Masao Nakaya	[23]
33	Pierre G. Paulin	[23]
34	Hans-Jörg Pfleiderer	[20]
35	Wolfgang Raab	[6] [9] [11] [15] [16] [17]
36	Jan M. Rabaey	[22]
37	Christian Sauer	[16]
38	Peter Schildberg	[7]
39	Jörg Schreiter	[14] [18]
40	René Schüffny	[14] [18]
41	Elisabeth Sicheneder	[4] [6] [8] [9]
42	Deepu Talla	[23]
43	Axel Techmer	[15] [16]
44	Chr. Werner	[12]
45	Matthias Wesseling	[1] [6] [9]
46	David Witt	[22]
47	Wayne Wolf	[23]
48	A. Wörner	[12]
49	Andreas Wurz	[6] [9]

Colors in the list of coauthors