 | 1996 |
|---|
| 9 |       | Richard L. Rudell:
Tutorial: Design of a Logic Synthesis System.
DAC 1996: 191-196 |
| 1995 |
|---|
| 8 |  | Richard L. Rudell:
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995, San Jose, California, USA, November 5-9, 1995
IEEE Computer Society 1995 |
| 7 | | Vigyan Singhal,
Carl Pixley,
Richard L. Rudell,
Robert K. Brayton:
The Validity of Retiming Sequential Circuits.
DAC 1995: 316-321 |
| 1994 |
|---|
| 6 | | Jochen A. G. Jess,
Richard L. Rudell:
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994, San Jose, California, USA, November 6-10, 1994
IEEE Computer Society 1994 |
| 5 | | Narendra V. Shenoy,
Richard L. Rudell:
Efficient implementation of retiming.
ICCAD 1994: 226-233 |
| 1990 |
|---|
| 4 | | Karl S. Brace,
Richard L. Rudell,
Randal E. Bryant:
Efficient Implementation of a BDD Package.
DAC 1990: 40-45 |
| 1988 |
|---|
| 3 | | Karen A. Bartlett,
Robert K. Brayton,
Gary D. Hachtel,
Reily M. Jacoby,
Christopher R. Morrison,
Richard L. Rudell,
Alberto L. Sangiovanni-Vincentelli,
Albert R. Wang:
Multi-level logic minimization using implicit don't cares.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 723-740 (1988) |
| 1987 |
|---|
| 2 | | Richard L. Rudell,
Alberto L. Sangiovanni-Vincentelli:
Multiple-Valued Minimization for PLA Optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(5): 727-750 (1987) |
| 1 | | Robert K. Brayton,
Richard L. Rudell,
Alberto L. Sangiovanni-Vincentelli,
Albert R. Wang:
MIS: A Multiple-Level Logic Optimization System.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1062-1081 (1987) |
