| 2007 | ||
|---|---|---|
| 5 | John Kubiatowicz, Howard Sachs: Guest Editors' Introduction: Hot Chips 18. IEEE Micro 27(2): 7-9 (2007) | |
| 2003 | ||
| 4 | Howard Sachs: A New High Performance Embedded "Hard Core" Vector DSP Architecture for Multimedia Applications. ESTImedia 2003: 2-4 | |
| 1999 | ||
| 3 | Mark Birnbaum, Howard Sachs: How VSIA Answers the SOC Dilemma. IEEE Computer 32(6): 42-50 (1999) | |
| 1995 | ||
| 2 | Siamak Arya, Howard Sachs, Sreeram Duvvuru: An architecture for high instruction level parallelism. HICSS (1) 1995: 153-162 | |
| 1989 | ||
| 1 | Walter Hollingsworth, Howard Sachs, Alan Jay Smith: The Clipper Processor: Instruction Set Architecture and Implementation. Commun. ACM 32(2): 200-219 (1989) | |
| 1 | Siamak Arya | [2] |
| 2 | Mark Birnbaum | [3] |
| 3 | Sreeram Duvvuru | [2] |
| 4 | Walter Hollingsworth | [1] |
| 5 | John Kubiatowicz | [5] |
| 6 | Alan Jay Smith | [1] |