| 1992 | ||
|---|---|---|
| 2 | Régis Leveugle, C. Safina: Generation of optimized datapaths: bit-slice versus standard cells. Synthesis for Control Dominated Circuits 1992: 153-166 | |
| 1 | C. Safina, Régis Leveugle: Clocking scheme selection for circuits made up of a controller and a datapath. Synthesis for Control Dominated Circuits 1992: 293-308 | |
| 1 | Régis Leveugle | [1] [2] |