Arash Saifhashemi

	2007
3		Jo C. Ebergen, Steve Furber, Arash Saifhashemi: Notes On Pulse Signaling. ASYNC 2007: 15-24
	2005
2		Arash Saifhashemi, Peter A. Beerel: High Level Modeling of Channel-Based Asynchronous Circuits Using Verilog. CPA 2005: 275-288
	2003
1		Arash Saifhashemi, Hossein Pedram: Verilog HDL, powered by PLI: a suitable framework for describing and modeling asynchronous circuits at all levels of abstraction. DAC 2003: 330-333

Coauthor Index

1	Peter A. Beerel	[2]
2	Jo C. Ebergen	[3]
3	Stephen B. Furber (Steve Furber)	[3]
4	Hossein Pedram	[1]

Colors in the list of coauthors