Yoshiki Saito

	2009
3		Toru Sano, Yoshiki Saito, Hideharu Amano: Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors. ERSA 2009: 112-118
2		Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano: A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. ERSA 2009: 283-286
	2008
1		Takashi Nishimura, Keiichiro Hirai, Yoshiki Saito, Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsusmi, Vasutan Tunbunheng, Hideharu Amano: Power reduction techniques for Dynamically Reconfigurable Processor Arrays. FPL 2008: 305-310

Coauthor Index

1	Hideharu Amano	[1] [2] [3]
2	Yohei Hasegawa	[1]
3	Keiichiro Hirai	[1]
4	Masaru Kato	[2]
5	Takuro Nakamura	[1]
6	Takashi Nishimura	[1]
7	Toru Sano	[2] [3]
8	Satoshi Tsutsusmi	[1]
9	Vasutan Tunbunheng	[1] [2]
10	Yoshihiro Yasuda	[2]