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18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIttetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors. ASP-DAC 2009: 449-454
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHassan A. Youness, Keishi Sakanushi, Yoshinori Takeuchi, Ashraf Salem, Abdel-Moneim Wahdan, Masaharu Imai: Optimal Scheme for Search State Space and Scheduling on Multiprocessor Systems. IEICE Transactions 92-A(4): 1088-1095 (2009)
2007
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTakeshi Shiro, Masaaki Abe, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: A Processor Generation Method from Instruction Behavior Description Based on Specification of Pipeline Stages and Functional Units. ASP-DAC 2007: 286-291
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: A low power VLIW processor generation method by means of extracting non-redundant activation conditions. CODES+ISSS 2007: 227-232
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLM. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC CoRR abs/0710.4746: (2007)
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Hiroki Tagawa, Yutaka Ota, Nobu Matsumoto: Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram. IEICE Transactions 90-A(12): 2800-2809 (2007)
2006
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHiroaki Tanaka, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai, Yutaka Ota, Nobu Matsumoto, Masaki Nakagawa: Pack instruction generation for media pUsing multi-valued decision diagram. CODES+ISSS 2006: 154-159
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLIttetsu Taniguchi, Kyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Task Partitioning Oriented Architecture Exploration Method for Dynamic Reconfigurable Architectures. VLSI-SoC 2006: 290-295
2005
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLM. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Enabling RTOS simulation modeling in a system level design language. ASP-DAC 2005: 936-939
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLM. Abdelsalam Hassan, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: RTK-Spec TRON: A Simulation Model of an ITRON Based RTOS Kernel in SystemC. DATE 2005: 554-559
2004
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYuki Kobayashi, Shinsuke Kobayashi, Koji Okuda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Synthesizable HDL generation method for configurable VLIW processors. ASP-DAC 2004: 842-845
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKyoko Ueda, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Architecture-Level Performance Estimation for IP-Based Embedded Systems. DATE 2004: 1002-1007
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLH. M. AbdElSalam, Shinsuke Kobayashi, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai: Towards a Higher Level of Abstraction in Hardware/Software Co-Simulation. ICDCS Workshops 2004: 824-830
5no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYohei Ishimaru, Keishi Sakanushi, Shinsuke Kobayashi, Yoshinori Takeuchi, Masaharu Imai: S-sequence: a new floorplan representation method preserving room abutment relationships. ISCAS (4) 2004: 505-508
2003
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHiroaki Tanaka, Shinsuke Kobayashi, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai: A Code Selection Method for SIMD Processors with PACK Instructions. SCOPES 2003: 66-80
2002
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChangwen Zhuang, Yoji Kajitani, Keishi Sakanushi, Liyan Jin: An Enhanced Q-Sequence Augmented with Empty-Room-Insertion and Parenthesis Trees. DATE 2002: 61-68
1998
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKeishi Sakanushi, Shigetoshi Nakatake, Yoji Kajitani: The multi-BSG: stochastic approach to an optimum packing of convex-rectilinear blocks. ICCAD 1998: 267-274
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShigetoshi Nakatake, Keishi Sakanushi, Yoji Kajitani, Masahiro Kawakita: The channeled-BSG: a universal floorplan for simultaneous place/route with IC applications. ICCAD 1998: 418-425

Coauthor Index

1H. M. AbdElSalam [6]
2Masaaki Abe [16]
3Francky Catthoor [18]
4M. Abdelsalam Hassan [9] [10] [14]
5Masaharu Imai [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
6Yohei Ishimaru [5]
7Hirofumi Iwato [15]
8Murali Jayapala [18]
9Liyan Jin [3]
10Yoji Kajitani [1] [2] [3]
11Masahiro Kawakita [1]
12Shinsuke Kobayashi [4] [5] [6] [8]
13Yuki Kobayashi [8]
14Nobu Matsumoto [12] [13]
15Masaki Nakagawa [12]
16Shigetoshi Nakatake [1] [2]
17Koji Okuda [8]
18Yutaka Ota [12] [13]
19Praveen Raghavan [18]
20Ashraf Salem [17]
21Takeshi Shiro [16]
22Hiroki Tagawa [13]
23Yoshinori Takeuchi [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
24Hiroaki Tanaka [4] [12] [13]
25Ittetsu Taniguchi [11] [18]
26Kyoko Ueda [7] [11]
27Abdel-Moneim Wahdan [17]
28Hassan A. Youness [17]
29Changwen Zhuang [3]

Colors in the list of coauthors

Copyright © Fri Nov 13 21:28:18 2009 by Michael Ley (ley@uni-trier.de)