Debasis Samanta

	2009
18		Ashalatha Nayak, Debasis Samanta: Model-based test cases synthesis using UML interaction diagrams. ACM SIGSOFT Software Engineering Notes 34(2): 1-10 (2009)
17		E. S. F. Najumudheen, Rajib Mall, Debasis Samanta: A dependence graph-based representation for test coverage analysis of object-oriented programs. ACM SIGSOFT Software Engineering Notes 34(2): 1-8 (2009)
16		Somnath Dey, Debasis Samanta: An efficient approach to iris detection for iris biometric processing. IJCAT 35(1): 2-9 (2009)
15		Debasish Kundu, Debasis Samanta: A Novel Approach to Generate Test Cases from UML Activity Diagrams. Journal of Object Technology 8(3): 65-83 (2009)
14		Debasish Kundu, Monalisa Sarma, Debasis Samanta, Rajib Mall: System testing for object-oriented systems with test case prioritization. Softw. Test., Verif. Reliab. 19(4): 297-333 (2009)
	2008
13		Samit Bhattacharya, Debasis Samanta, Anupam Basu: Study and modeling of user errors for virtual scanning keyboard design. CHI Extended Abstracts 2008: 3399-3404
12		Debasish Kundu, Monalisa Sarma, Debasis Samanta: A novel approach to system testing and reliability assessment using use case model. ISEC 2008: 147-148
11		Samit Bhattacharya, Debasis Samanta, Anupam Basu: User errors on scanning keyboards: Empirical study, model and design principles. Interacting with Computers 20(3): 406-418 (2008)
	2007
10		Debasish Kundu, Debasis Samanta: A Novel Approach of Prioritizing Use Case Scenarios. APSEC 2007: 542-549
9		Debasis Samanta, Pradipta Biswas: Designing Computer Interface for Physically Challenged Persons. ICIT 2007: 161-166
8		Debasish Kundu, Debasis Samanta: An Approach for Assessment of Reliability of the System Using Use Case Model. ICIT 2007: 243-245
7		Somnath Dey, Debasis Samanta: Accurate Iris Boundary Detection in Iris-Based Biometric Authentication Process. PReMI 2007: 600-607
6		Dhiren M. Parmar, Monalisa Sarma, Debasis Samanta: A Novel Approach to Domino Circuit Synthesis. VLSI Design 2007: 401-406
	2004
5		Debasis Samanta, Ajit Pal: Synthesis of Low Power High Performance Dual-VT PTL Circuits. VLSI Design 2004: 85-
	2003
4		Debasis Samanta, Ajit Pal: Synthesis of Dual-VT Dynamic CMOS Circuits. VLSI Design 2003: 303-308
	2002
3		Debasis Samanta, Ajit Pal: Optimal Dual -VT Assignment for Low-Voltage Energy-Constrained CMOS Circuits. VLSI Design 2002: 193-198
2		Debasis Samanta, Nishant Sinha, Ajit Pal: Synthesis of High Performance Low Power Dynamic CMOS Circuits. VLSI Design 2002: 99-104
	2001
1		Nikhil Tripathi, Amit M. Bhosle, Debasis Samanta, Ajit Pal: Optimal Assignment of High Threshold Voltage for Synthesizing Dual Threshold CMOS Circuits. VLSI Design 2001: 227-

Coauthor Index

1	Anupam Basu	[11] [13]
2	Samit Bhattacharya	[11] [13]
3	Amit M. Bhosle	[1]
4	Pradipta Biswas	[9]
5	Somnath Dey	[7] [16]
6	Debasish Kundu	[8] [10] [12] [14] [15]
7	Rajib Mall	[14] [17]
8	E. S. F. Najumudheen	[17]
9	Ashalatha Nayak	[18]
10	Ajit Pal	[1] [2] [3] [4] [5]
11	Dhiren M. Parmar	[6]
12	Monalisa Sarma	[6] [12] [14]
13	Nishant Sinha	[2]
14	Nikhil Tripathi	[1]

Colors in the list of coauthors