Krzysztof Sapiecha Coauthor index DBLP Vis pubzone.org

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DBLP keys2008
13no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMariusz Bedla, Krzysztof Sapiecha: A Store of Java Objects on a Multicomputer. ICEIS (1) 2008: 374-379
12no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrzysztof Sapiecha, Damian Grela: Automating Test Case Generation for Requirements Specification for Processes Orchestrating Web Services. ICEIS (3-1) 2008: 381-384
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLArkadiusz Chrobot, Grzegorz Lukawski, Krzysztof Sapiecha: Scalable Distributed Data Structures for Linux-based Multicomputer. ISPDC 2008: 424-428
2007
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGrzegorz Lukawski, Krzysztof Sapiecha: Fault Tolerant Record Placement for Decentralized SDDS LH*. PPAM 2007: 312-320
2006
9no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGrzegorz Lukawski, Krzysztof Sapiecha: Software Functional Fault Injector for SDDS. ARCS Workshops 2006: 76-85
2005
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrzysztof Sapiecha, Grzegorz Lukawski: Fault-Tolerant Protocols for Scalable Distributed Data Structures. PPAM 2005: 1018-1025
2004
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJoanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha: Validation of Reactive Embedded Systems against Temporal Requirements. ECBS 2004: 152-160
2003
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRadoslaw Czarnecki, Stanislaw Deniziak, Krzysztof Sapiecha: An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs. DSD 2003: 443-446
2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLStanislaw Deniziak, Krzysztof Sapiecha: Developing a High-Level Fault Simulation Standard. IEEE Computer 34(5): 89-90 (2001)
1999
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLStanislaw Deniziak, Krzysztof Sapiecha: High Level Testbench Generation for VHDL Models. ECBS 1999: 146-151
1994
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLStanislaw Deniziak, Krzysztof Sapiecha: Cupland - A Behavioral Level Description Compiler for Designing of PLD/EPLD-Based Systems. ISCAS 1994: 201-204
1990
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrzysztof Sapiecha, R. Jarocki: Modular Architecture for High Performance Implementatin of the FFT Algorithm. IEEE Trans. Computers 39(12): 1464-1468 (1990)
1986
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrzysztof Sapiecha, R. Jarocki: Modular Architecture for High Performance Implementation of FFT Algorithm. ISCA 1986: 261-270

Coauthor Index

1Mariusz Bedla [13]
2Arkadiusz Chrobot [11]
3Radoslaw Czarnecki [6]
4Stanislaw Deniziak [3] [4] [5] [6] [7]
5Damian Grela [12]
6R. Jarocki [1] [2]
7Grzegorz Lukawski [8] [9] [10] [11]
8Joanna Strug [7]

Colors in the list of coauthors

Copyright © Wed Dec 23 18:45:02 2009 by Michael Ley (ley@uni-trier.de)