| 2009 | ||
|---|---|---|
| 2 | V. Vireen, N. Venugopalachary, G. Seetharaman, B. Venkataramani: Built in Self Test Based Design of Wave-Pipelined Circuits in ASICs. VLSI Design 2009: 473-478 | |
| 1 | G. Seetharaman, B. Venkataramani: Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits. TRETS 2(2): (2009) | |
| 1 | B. Venkataramani | [1] [2] |
| 2 | N. Venugopalachary | [2] |
| 3 | V. Vireen | [2] |