Lukás Sekanina Coauthor index pubzone.org

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81Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Kotásek, Jan Bouda, Ivana Cerná, Lukás Sekanina, Tomás Vojnar, David Antos: Mathematical and Engineering Methods in Computer Science - 7th International Doctoral Workshop, MEMICS 2011, Lednice, Czech Republic, October 14-16, 2011, Revised Selected Papers Springer 2012
80Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Zdenek Vasícek: A SAT-based fitness function for evolutionary optimization of polymorphic circuits. DATE 2012: 715-720
79Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Vojtech Salajka: Towards new applications of multi-function logic: Image multi-filtering. DATE 2012: 824-827
78Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichaela Sikulová, Lukás Sekanina: Coevolution in Cartesian Genetic Programming. EuroGP 2012: 182-193
77Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTobiás Smolka, Petr Svenda, Lukás Sekanina, Vashek Matyás: Evolutionary Design of Message Efficient Secrecy Amplification Protocols. EuroGP 2012: 194-205
2011
76Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: A global postsynthesis optimization method for combinational circuits. DATE 2011: 1525-1528
75Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRichard Ruzicka, Vaclav Simek, Lukás Sekanina: Behavior of CMOS polymorphic circuits in high temperature environment. DDECS 2011: 447-452
74Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolution of digital circuits. GECCO (Companion) 2011: 1343-1360
73Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPavol Korcek, Lukás Sekanina, Otto Fucík: A scalable cellular automata based microscopic traffic simulation. Intelligent Vehicles Symposium 2011: 13-18
72Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMilos Minarik, Lukás Sekanina: Evolution of Iterative Formulas Using Cartesian Genetic Programming. KES (1) 2011: 11-20
71Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRuben Salvador, Andrés Otero, Javier Mora, Eduardo de la Torre, Lukás Sekanina, Teresa Riesgo: Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems. ReConFig 2011: 164-169
70Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLudek Zaloudek, Lukás Sekanina: Increasing Fault-Tolerance in Cellular Automata-Based Systems. UC 2011: 234-245
69Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRuben Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina: Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems. EURASIP J. Adv. Sig. Proc. 2011: (2011)
68Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines 12(3): 305-327 (2011)
67Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Tomas Komenda: Global Control in Polymorphic Cellular Automata. J. Cellular Automata 6(4-5): 301-321 (2011)
66Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZbysek Gajda, Lukás Sekanina: On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits. Multiple-Valued Logic and Soft Computing 17(5-6): 607-631 (2011)
2010
65Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina, Michal Bidlo: A method for design of impulse bursts noise filters optimized for FPGA implementations. DATE 2010: 1731-1736
64Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVaclav Simek, Richard Ruzicka, Lukás Sekanina: On analysis of fabricated polymorphic circuits. DDECS 2010: 281-284
63Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPetr Fiser, Jan Schmidt, Zdenek Vasícek, Lukás Sekanina: On logic synthesis of conventionally hard to synthesize circuits using genetic programming. DDECS 2010: 346-351
62Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolutionary circuit design: Tutorial. DDECS 2010: 5
61Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRuben Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina: High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs. DSD 2010: 96-103
60Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZbysek Gajda, Lukás Sekanina: When does Cartesian genetic programming minimize the phenotype size implicitly? GECCO 2010: 983-984
59Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZbysek Gajda, Lukás Sekanina: An Efficient Selection Strategy for Digital Circuit Evolution. ICES 2010: 13-24
58Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJirí Simácek, Lukás Sekanina, Lukás Starecek: Evolutionary Design of Reconfiguration Strategies to Reduce the Test Application Time. ICES 2010: 214-225
2009
57Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZbysek Gajda, Lukás Sekanina: Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming. IEEE Congress on Evolutionary Computation 2009: 1599-1604
56Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolvable Hardware: From Applications to Implications for the Theory of Computation. UC 2009: 24-36
55Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPetr Svenda, Lukás Sekanina, Václav Matyás: Evolutionary design of secrecy amplification protocols for wireless sensor networks. WISEC 2009: 225-236
2008
54no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGregory Hornby, Lukás Sekanina, Pauline C. Haddow: Evolvable Systems: From Biology to Hardware, 8th International Conference, ICES 2008, Prague, Czech Republic, September 21-24, 2008. Proceedings Springer 2008
53Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: Novel Hardware Implementation of Adaptive Median Filters. DDECS 2008: 110-115
52Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Starecek, Lukás Sekanina, Zdenek Kotásek: Reduction of Test Vectors Volume by Means of Gate-Level Reconfiguration. DDECS 2008: 255-268
51Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: Hardware Accelerators for Cartesian Genetic Programming. EuroGP 2008: 230-241
50Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Petr Mikusek: Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures. EvoWorkshops 2008: 144-153
49Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Martin Zádník, Lukás Sekanina, Jirí Tobola: On Evolutionary Synthesis of Linear Transforms in FPGA. ICES 2008: 141-152
48Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLudek Zaloudek, Lukás Sekanina: Transistor-Level Evolution of Digital Circuits Using a Special Circuit Simulator. ICES 2008: 320-331
47Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRichard Ruzicka, Lukás Sekanina, Roman Prokop: Physical Demonstration of Polymorphic Self-Checking Circuits. IOLTS 2008: 31-36
46Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMircea Gh. Negoita, Lukás Sekanina, Adrian Stoica: Adaptive and Evolvable Hardware and Systems: The State of the Art and the Prospectus for Future Development. KES (3) 2008: 310-318
45Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomas Pecenka, Lukás Sekanina, Zdenek Kotásek: Evolution of synthetic RTL benchmark circuits with predefined testability. ACM Trans. Design Autom. Electr. Syst. 13(3): (2008)
44Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Lukás Starecek, Zdenek Kotásek, Zbysek Gajda: Polymorphic Gates in Design and Test of Digital Circuits. IJUC 4(2): 125-142 (2008)
2007
43Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: Evaluation of a New Platform For Image Filter Evolution. AHS 2007: 577-586
42Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Tomas Hruska, Tomás Vojnar, Dusan Kolár, Jan Cernocký: On Some Directions in Security-Oriented Research. BLISS 2007: 141-144
41no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Design and Analysis of a New Self-Testing Adder which Utilizes Polymorphic Gates. DDECS 2007: 243-246
40Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKarel Slaný, Lukás Sekanina: Fitness Landscape Analysis and Image Filter Evolution Using Functional-Level CGP. EuroGP 2007: 311-320
39Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: An area-efficient alternative to adaptive median filtering in FPGAs. FPL 2007: 216-221
38Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZbysek Gajda, Lukás Sekanina: Reducing the number of transistors in digital circuits using gate-level evolutionary design. GECCO 2007: 245-252
37Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolvable hardware. GECCO (Companion) 2007: 3627-3644
36Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolution of Polymorphic Self-checking Circuits. ICES 2007: 186-197
35Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLZdenek Vasícek, Lukás Sekanina: Reducing the Area on a Chip Using a Bank of Evolved Filters. ICES 2007: 222-232
34Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolutionary functional recovery in virtual reconfigurable circuits. JETC 3(2): (2007)
33Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolved Computing Devices and the Implementation Problem. Minds and Machines 17(3): 311-329 (2007)
2006
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolutionary Design of Digital Circuits: Where Are Current Limits? AHS 2006: 171-178
31Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Lukás Starecek, Zbysek Gajda, Zdenek Kotásek: Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. AHS 2006: 186-193
30no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRichard Ruzicka, Lukás Sekanina: Evolutionary circuit design in REPOMO - reconfigurable polymorphic module. Computational Intelligence 2006: 239-244
29Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: On dependability of FPGA-based evolvable hardware systems that utilize virtual reconfigurable circuits. Conf. Computing Frontiers 2006: 221-228
28no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomas Pecenka, Zdenek Kotásek, Lukás Sekanina: FITTest_BENCH06: A New Set of Benchmark Circuits Reflecting Diagnostic Properties. DDECS 2006: 285-289
27no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Lukás Starecek, Zdenek Kotásek: Novel Logic Circuits Controlled by Vdd: Transistor-Level Simulations of Polymorphic Combinational Modules. DDECS 2006: 85-86
26Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomas Pecenka, Josef Strnadel, Zdenek Kotásek, Lukás Sekanina: Testability Estimation Based on Controllability and Observability Parameters. DSD 2006: 504-514
25Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Zdenek Vasícek: On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level. EvoWorkshops 2006: 344-355
2005
24Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolutionary Design of Gate-Level Polymorphic Digital Circuits. EvoWorkshops 2005: 185-194
23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomas Pecenka, Zdenek Kotásek, Lukás Sekanina, Josef Strnadel: Automatic Discovery of RTL Benchmark Circuits with Predefined Testability Properties. Evolvable Hardware 2005: 51-58
22Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Ricardo Salem Zebulum: Evolutionary Discovering of the Concept of the Discrete State at the Transistor Level. Evolvable Hardware 2005: 73-78
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMichal Bidlo, Lukás Sekanina: Providing information from the environment for growing electronic circuits through polymorphic gates. GECCO Workshops 2005: 242-248
20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRicardo Salem Zebulum, Adrian Stoica, Didier Keymeulen, Lukás Sekanina, Rajeshuni Ramesham, Xin Guo: Evolvable Hardware System at Extreme Low Temperatures. ICES 2005: 37-45
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJan Korenek, Lukás Sekanina: Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs. ICES 2005: 46-55
18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTomás Martínek, Lukás Sekanina: An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA. ICES 2005: 76-85
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Ricardo Salem Zebulum: Intrinsic Evolution of Controllable Oscillators in FPTA-2. ICES 2005: 98-107
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Michal Bidlo: Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. Genetic Programming and Evolvable Machines 6(3): 319-347 (2005)
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Tughrul Arslan: Evolvable Components-From Theory to Hardware Implementations. Genetic Programming and Evolvable Machines 6(4): 461-462 (2005)
2004
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Vladimír Drábek: Theory and Applications of Evolvable Embedded Systems. ECBS 2004: 186-194
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolutionary Design Space Exploration for Median Circuits. EvoWorkshops 2004: 240-249
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Stepan Friedl: On Routine Implementation of Virtual Evolvable Devices Using COMBO6. Evolvable Hardware 2004: 63-70
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJim Torresen, Jorgen W. Bakke, Lukás Sekanina: Recognizing Speed Limit Sign Numbers by Evolvable Hardware. PPSN 2004: 682-691
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Evolving Constructors for Infinitely Growing Sorting Networks and Medians. SOFSEM 2004: 314-323
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Stepan Friedl: An Evolvable Combinational Unit for FPGAs. Computers and Artificial Intelligence 23(5): 461-486 (2004)
2003
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: From Implementations to a General Concept of Evolvable Machines. EuroGP 2003: 424-433
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Richard Ruzicka: Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. Evolvable Hardware 2003: 135-144
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Towards Evolvable IP Cores for FPGAs. Evolvable Hardware 2003: 145-154
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Virtual Reconfigurable Circuits for Real-World Applications of Evolvable Hardware. ICES 2003: 186-197
2002
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Jim Torresen: Detection of Norwegian Speed Limit Signs. ESM 2002: 337-340
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina: Image Filter Design with Evolvable Hardware. EvoWorkshops 2002: 255-266
2000
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Azeddien M. Sllame: Toward Uniform Approach to Design of Evolvable Hardware Based Systems. FPL 2000: 814-817
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLukás Sekanina, Vladimír Drábek: Relation between Fault Tolerance and Reconfiguration in Cellular Systems. IOLTW 2000: 25-30

Coauthor Index

1David Antos [81]
2Tughrul Arslan [15]
3Jorgen W. Bakke [11]
4Michal Bidlo [16] [21] [65]
5Jan Bouda [81]
6Ivana Cerná (Ivana Cerna) [81]
7Jan Cernocký [42]
8Vladimír Drábek [1] [14]
9Petr Fiser [63]
10Stepan Friedl [9] [12]
11Otto Fucík [73]
12Zbysek Gajda [31] [38] [44] [57] [59] [60] [66]
13Xin Guo [20]
14Pauline C. Haddow [54]
15Gregory Hornby (Gregory S. Hornby) [54]
16Tomas Hruska [42]
17Didier Keymeulen [20]
18Dusan Kolár [42]
19Tomas Komenda [67]
20Pavol Korcek [73]
21Jan Korenek [19]
22Zdenek Kotásek [23] [26] [27] [28] [31] [44] [45] [52] [81]
23Tomás Martínek [18]
24Václav Matyás [55]
25Vashek Matyas (Vashek Matyás) [77]
26Petr Mikusek [50]
27Milos Minarik [72]
28Javier Mora [71]
29Félix Moreno [61] [69]
30Mircea Gh. Negoita [46]
31Andrés Otero [71]
32Tomas Pecenka [23] [26] [28] [45]
33Roman Prokop [47]
34Rajeshuni Ramesham [20]
35Teresa Riesgo [61] [69] [71]
36Richard Ruzicka [7] [30] [47] [64] [75]
37Vojtech Salajka [79]
38Ruben Salvador [61] [69] [71]
39Jan Schmidt [63]
40Michaela Sikulová [78]
41Jirí Simácek [58]
42Vaclav Simek [64] [75]
43Karel Slaný [40]
44Azeddien M. Sllame [2]
45Tobiás Smolka [77]
46Lukás Starecek [27] [31] [44] [52] [58]
47Adrian Stoica [20] [46]
48Josef Strnadel [23] [26]
49Petr Svenda [55] [77]
50Jirí Tobola [49]
51Eduardo de la Torre [71]
52Jim Torresen (Jim Tørresen) [4] [11]
53Zdenek Vasícek [25] [35] [39] [43] [49] [51] [53] [63] [65] [68] [76] [80]
54Tomás Vojnar [42] [81]
55Martin Zádník [49]
56Ludek Zaloudek [48] [70]
57Ricardo Salem Zebulum [17] [20] [22]

Colors in the list of coauthors

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