| 2012 | ||
|---|---|---|
| 57 | Sanjit A. Seshia: Sciduction: Combining Induction, Deduction, and Structure for Verification and Synthesis CoRR abs/1201.0979: (2012) | |
| 56 | John C. Eidson, Edward A. Lee, Slobodan Matic, Sanjit A. Seshia, Jia Zou: Distributed Real-Time Software for Cyber-Physical Systems. Proceedings of the IEEE 100(1): 45-59 (2012) | |
| 2011 | ||
| 55 | Daniel Holcomb, Bryan A. Brady, Sanjit A. Seshia: Abstraction-based performance verification of NoCs. DAC 2011: 492-497 | |
| 54 | Bryan A. Brady, Daniel Holcomb, Sanjit A. Seshia: Counterexample-guided SMT-driven optimal buffer sizing. DATE 2011: 329-334 | |
| 53 | Susmit Jha, Sanjit A. Seshia, Ashish Tiwari: Synthesis of optimal switching logic for hybrid systems. EMSOFT 2011: 107-116 | |
| 52 | Jeff C. Jensen, Edward A. Lee, Sanjit A. Seshia: An introductory capstone design course on embedded systems. ISCAS 2011: 1199-1202 | |
| 51 | Wenchao Li, Lili Dworkin, Sanjit A. Seshia: Mining assumptions for synthesis. MEMOCODE 2011: 43-50 | |
| 50 | Sanjit A. Seshia, Jonathan Kotker: GameTime: A Toolkit for Timing Analysis of Software. TACAS 2011: 388-392 | |
| 49 | Susmit Jha, Sanjit A. Seshia, Ashish Tiwari: Synthesizing Switching Logic to Minimize Long-Run Cost CoRR abs/1103.0800: (2011) | |
| 2010 | ||
| 48 | Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici: Post-silicon validation opportunities, challenges and recent advances. DAC 2010: 12-17 | |
| 47 | Wenchao Li, Alessandro Forin, Sanjit A. Seshia: Scalable specification mining for verification and diagnosis. DAC 2010: 755-760 | |
| 46 | Dave King, Susmit Jha, Divya Muthukumaran, Trent Jaeger, Somesh Jha, Sanjit A. Seshia: Automating Security Mediation Placement. ESOP 2010: 327-344 | |
| 45 | Sanjit A. Seshia: Quantitative Analysis of Software: Challenges and Recent Advances. FACS 2010: 1-5 | |
| 44 | Pierluigi Nuzzo, Alberto Puggelli, Sanjit A. Seshia, Alberto L. Sangiovanni-Vincentelli: CalCS: SMT solving for non-linear convex constraints. FMCAD 2010: 71-79 | |
| 43 | Susmit Jha, Sumit Gulwani, Sanjit A. Seshia, Ashish Tiwari: Oracle-guided component-based program synthesis. ICSE (1) 2010: 215-224 | |
| 42 | Bryan A. Brady, Randal E. Bryant, Sanjit A. Seshia, John W. O'Leary: ATLAS: Automatic Term-level abstraction of RTL designs. MEMOCODE 2010: 31-40 | |
| 2009 | ||
| 41 | Cynthia Sturton, Susmit Jha, Sanjit A. Seshia, David Wagner: On voting machine design for verification and testability. ACM Conference on Computer and Communications Security 2009: 463-476 | |
| 40 | Susmit Jha, Rhishikesh Limaye, Sanjit A. Seshia: Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic. CAV 2009: 668-674 | |
| 39 | Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Giusto, Alberto L. Sangiovanni-Vincentelli, Sanjit A. Seshia: Optimizations of an application-level protocol for enhanced dependability in FlexRay. DATE 2009: 1076-1081 | |
| 38 | Daniel Holcomb, Wenchao Li, Sanjit A. Seshia: Design as you see FIT: System-level soft error analysis of sequential circuits. DATE 2009: 785-790 | |
| 37 | Susmit Jha, Wenchao Li, Sanjit A. Seshia: Localizing transient faults using dynamic bayesian networks. HLDVT 2009: 82-87 | |
| 36 | Edward A. Lee, Slobodan Matic, Sanjit A. Seshia, Jia Zou: The Case for Timing-Centric Distributed Software Invited Paper. ICDCS Workshops 2009: 57-64 | |
| 35 | Clark W. Barrett, Roberto Sebastiani, Sanjit A. Seshia, Cesare Tinelli: Satisfiability Modulo Theories. Handbook of Satisfiability 2009: 825-885 | |
| 34 | Susmit Jha, Sanjit A. Seshia, Rhishikesh Limaye: On the Computational Complexity of Satisfiability Solving for String Theories CoRR abs/0903.2825: (2009) | |
| 33 | Randal E. Bryant, Daniel Kroening, Joël Ouaknine, Sanjit A. Seshia, Ofer Strichman, Bryan A. Brady: An abstraction-based decision procedure for bit-vector arithmetic. STTT 11(2): 95-104 (2009) | |
| 2008 | ||
| 32 | Orna Kupferman, Wenchao Li, Sanjit A. Seshia: A Theory of Mutations with Applications to Vacuity, Coverage, and Fault Tolerance. FMCAD 2008: 1-9 | |
| 31 | Sanjit A. Seshia, Alexander Rakhlin: Game-theoretic timing analysis. ICCAD 2008: 575-582 | |
| 30 | Dave King, Trent Jaeger, Somesh Jha, Sanjit A. Seshia: Effective blame for information-flow violations. SIGSOFT FSE 2008: 250-260 | |
| 2007 | ||
| 29 | Sanjit A. Seshia, Wenchao Li, Subhasish Mitra: Verification-guided soft error resilience. DATE 2007: 1442-1447 | |
| 28 | Thomas Huining Feng, Lynn Wang, Wei Zheng, Sri Kanajan, Sanjit A. Seshia: Interactive presentation: Automatic model generation for black box real-time systems. DATE 2007: 930-935 | |
| 27 | Susmit Jha, Bryan A. Brady, Sanjit A. Seshia: Symbolic Reachability Analysis of Lazy Linear Hybrid Automata. FORMATS 2007: 241-256 | |
| 26 | Sanjit A. Seshia: Autonomic Reactive Systems via Online Learning. ICAC 2007: 30 | |
| 25 | Daniel Kroening, Sanjit A. Seshia: Formal verification at higher levels of abstraction. ICCAD 2007: 572-578 | |
| 24 | Dirk Beyer, Arindam Chakrabarti, Thomas A. Henzinger, Sanjit A. Seshia: An Application ofWeb-Service Interfaces. ICWS 2007: 831-838 | |
| 23 | Armando Solar-Lezama, Gilad Arnold, Liviu Tancau, Rastislav Bodík, Vijay A. Saraswat, Sanjit A. Seshia: Sketching stencils. PLDI 2007: 167-178 | |
| 22 | Randal E. Bryant, Daniel Kroening, Joël Ouaknine, Sanjit A. Seshia, Ofer Strichman, Bryan A. Brady: Deciding Bit-Vector Arithmetic with Abstraction. TACAS 2007: 358-372 | |
| 21 | Sanjit A. Seshia, K. Subramani, Randal E. Bryant: On Solving Boolean Combinations of UTVPI Constraints. JSAT 3(1-2): 67-90 (2007) | |
| 2006 | ||
| 20 | Armando Solar-Lezama, Liviu Tancau, Rastislav Bodík, Sanjit A. Seshia, Vijay A. Saraswat: Combinatorial sketching for finite programs. ASPLOS 2006: 404-415 | |
| 2005 | ||
| 19 | Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Stevens: Modeling and Verifying Circuits Using Generalized Relative Timing. ASYNC 2005: 98-108 | |
| 18 | Randal E. Bryant, Sanjit A. Seshia: Decision Procedures Customized for Formal Verification. CADE 2005: 255-259 | |
| 17 | Vinod Ganapathy, Sanjit A. Seshia, Somesh Jha, Thomas W. Reps, Randal E. Bryant: Automatic discovery of API-level exploits. ICSE 2005: 312-321 | |
| 16 | Mihai Christodorescu, Somesh Jha, Sanjit A. Seshia, Dawn Xiaodong Song, Randal E. Bryant: Semantics-Aware Malware Detection. IEEE Symposium on Security and Privacy 2005: 32-46 | |
| 15 | Sanjit A. Seshia, Randal E. Bryant: Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution Bounds CoRR abs/cs/0508044: (2005) | |
| 14 | Sanjit A. Seshia, Randal E. Bryant: Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution Bounds. Logical Methods in Computer Science 1(2): (2005) | |
| 13 | Cormac Flanagan, Stephen N. Freund, Shaz Qadeer, Sanjit A. Seshia: Modular verification of multithreaded programs. Theor. Comput. Sci. 338(1-3): 153-183 (2005) | |
| 2004 | ||
| 12 | Daniel Kroening, Joël Ouaknine, Sanjit A. Seshia, Ofer Strichman: Abstraction-Based Satisfiability Solving of Presburger Arithmetic. CAV 2004: 308-320 | |
| 11 | Shuvendu K. Lahiri, Sanjit A. Seshia: The UCLID Decision Procedure. CAV 2004: 475-478 | |
| 10 | Sanjit A. Seshia, Randal E. Bryant: Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution Bounds. LICS 2004: 100-109 | |
| 2003 | ||
| 9 | Sanjit A. Seshia, Randal E. Bryant: Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods. CAV 2003: 154-166 | |
| 8 | Randal E. Bryant, Shuvendu K. Lahiri, Sanjit A. Seshia: Convergence Testing in Term-Level Bounded Model Checking. CHARME 2003: 348-362 | |
| 7 | Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Bryant: A hybrid SAT-based decision procedure for separation logic with uninterpreted functions. DAC 2003: 425-430 | |
| 2002 | ||
| 6 | Cormac Flanagan, Shaz Qadeer, Sanjit A. Seshia: A Modular Checker for Multithreaded Programs. CAV 2002: 180-194 | |
| 5 | Ofer Strichman, Sanjit A. Seshia, Randal E. Bryant: Deciding Separation Formulas with SAT. CAV 2002: 209-222 | |
| 4 | Randal E. Bryant, Shuvendu K. Lahiri, Sanjit A. Seshia: Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions. CAV 2002: 78-92 | |
| 3 | Shuvendu K. Lahiri, Sanjit A. Seshia, Randal E. Bryant: Modeling and Verification of Out-of-Order Microprocessors in UCLID. FMCAD 2002: 142-159 | |
| 1999 | ||
| 2 | A. K. Bhattacharjee, S. D. Dhodapkar, Sanjit A. Seshia, R. K. Shyamasundar: A Graphical Environment for the Specification and Verification of Reactive Systems. SAFECOMP 1999: 431-444 | |
| 1 | Sanjit A. Seshia, R. K. Shyamasundar, A. K. Bhattacharjee, S. D. Dhodapkar: A Translation of Statecharts to Esterel. World Congress on Formal Methods 1999: 983-1007 | |
Colors in the list of coauthors
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