 | 2005 |
|---|
| 5 |       | Hadi Esmaeilzadeh,
Saeed Shamshiri,
Pooya Saeedi,
Zainalabedin Navabi:
ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing.
Asian Test Symposium 2005: 236-241 |
| 4 | | Arash Hooshmand,
Saeed Shamshiri,
Mohammad Alisafaee,
Bijan Alizadeh,
Pejman Lotfi-Kamran,
Mostafa Naderi,
Zainalabedin Navabi:
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams.
ISCAS (1) 2005: 424-427 |
| 3 | | Saeed Shamshiri,
Hadi Esmaeilzadeh,
Zainalabedin Navabi:
Instruction-level test methodology for CPU core self-testing.
ACM Trans. Design Autom. Electr. Syst. 10(4): 673-689 (2005) |
| 2 | | Saeed Shamshiri,
Seid Mehdi Fakhraie:
Genetic-algorithm Memory Minimisation for Designing Reconfigurable Ip Address Lookup Engine.
International Journal of Computational Intelligence and Applications 5(1): 69-90 (2005) |
| 2004 |
|---|
| 1 | | Saeed Shamshiri,
Hadi Esmaeilzadeh,
Zainalabedin Navabi:
Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores.
Asian Test Symposium 2004: 158-163 |
