Abbas Sheibanyrad

	2008
5		Abbas Sheibanyrad, Alain Greiner, Ivan Miro Panades: Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. IEEE Design & Test of Computers 25(6): 572-580 (2008)
4		Abbas Sheibanyrad, Alain Greiner: Two efficient synchronous <--> asynchronous converters well-suited for networks-on-chip in GALS architectures. Integration 41(1): 17-26 (2008)
	2007
3		Abbas Sheibanyrad, Ivan Miro Panades, Alain Greiner: Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture. DATE 2007: 1090-1095
2		Abbas Sheibanyrad, Alain Greiner: Hybrid-Timing FIFOs to Use on Networks-on-Chip in GALS Architectures. ESA 2007: 27-33
	2006
1		Abbas Sheibanyrad, Alain Greiner: Two Efficient Synchronous Û Asynchronous Converters Well-Suited for Network on Chip in GALS Architectures. PATMOS 2006: 191-202

Coauthor Index

1	Alain Greiner	[1] [2] [3] [4] [5]
2	Ivan Miro Panades	[3] [5]