Jianzhong Shi

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1997

2 Jianzhong Shi, Dinesh Bhatia: Performance Driven Floorplanning for FPGA Based Designs. FPGA 1997: 112-118

1 Jianzhong Shi, Akash Randhar, Dinesh Bhatia: Macro Block Based FPGA Floorplanning. VLSI Design 1997: 21-26

	1997
2		Jianzhong Shi, Dinesh Bhatia: Performance Driven Floorplanning for FPGA Based Designs. FPGA 1997: 112-118
1		Jianzhong Shi, Akash Randhar, Dinesh Bhatia: Macro Block Based FPGA Floorplanning. VLSI Design 1997: 21-26

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