Tadashi Shibata

	2009
27		Norihiro Takahashi, Tadashi Shibata: A Non-subtraction Configuration of Self-similitude Architecture for Multiple-Resolution Edge-Filtering CMOS Image Sensor. ICANN (1) 2009: 391-400
26		Toshihiko Yamasaki, Tomoyuki Nakayama, Tadashi Shibata: A low-power switched-current CDMA matched filter employing MOS linear matching cell with on-chip A/D converter. Integration 42(2): 254-261 (2009)
	2008
25		Norihiro Takahashi, Kazuhide Fujita, Tadashi Shibata: An analog self-similitude edge-filtering processor for multiple-resolution image perception. ISCAS 2008: 1640-1643
24		Hitoshi Hayakawa, Tadashi Shibata: Spatiotemporal projection of motion field sequence for generating feature vectors in gesture perception. ISCAS 2008: 3526-3529
23		Tadashi Shibata: Special Section on Advanced Processors Based on Novel Concepts in Computation. IEICE Transactions 91-C(9): 1385 (2008)
	2006
22		Benjamas Tongprasit, Tadashi Shibata: Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI. ISCAS 2006
	2005
21		Benjamas Tongprasit, Kiyoto Ito, Tadashi Shibata: A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering. ISCAS (3) 2005: 2389-2392
20		Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata: A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter. ISCAS (6) 2005: 5365-5368
19		Yusuke Nakashita, Yoshio Mita, Tadashi Shibata: An Analog Visual Pre-Processing Processor. NIPS 2005
	2004
18		Tomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata: Quasi-parallel multi-path detection architecture using floating-gate-MOS-based CDMA matched filters. ISCAS (1) 2004: 425-428
17		Masayuki Umejima, Toshihiko Yamasaki, Tadashi Shibata: A bump-circuit-based motion detector using projected-activity histograms. ISCAS (1) 2004: 749-752
16		Hideo Yamasaki, Tadashi Shibata: A real-time VLSI median filter employing two-dimensional bit-propagating architecture. ISCAS (2) 2004: 349-352
	2003
15		Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata: A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors. NIPS 2003
14		Masakazu Yagi, Tadashi Shibata, Chihiro Tanikawa, Kenji Takada: A Robust Medical Image Recognition System Employing Edge-Based Feature Vector Representation. SCIA 2003: 534-540
	2002
13		Keng Hoong Wee, T. Yonezawa, Toshiyuki Nozawa, Tadashi Shibata, Tadahiro Ohmi: A zone-programmed EEPROM with real-time write monitoring for analog data storage. ISCAS (4) 2002: 655-658
12		Toshihiko Yamasaki, T. Taguchi, Tadashi Shibata: Low-power CDMA analog matched filters based on floating-gate technology. ISCAS (5) 2002: 625-628
11		Huaiyu Xu, Yoshio Mita, Tadashi Shibata: Intelligent Internet Search Applications Based on VLSI Associative Processors. SAINT 2002: 230-237
	2001
10		Keng Hoong Wee, Toshiyuki Nozawa, T. Yonezawa, Y. Yamashita, Tadashi Shibata, Tadahiro Ohmi: High-precision analog EEPROM with real-time write monitoring. ISCAS (1) 2001: 105-108
9		Toshihiko Yamasaki, Tadashi Shibata: An analog similarity evaluation circuit featuring variable functional forms. ISCAS (3) 2001: 561-564
8		Toshihiko Yamasaki, A. Suzuki, D. Kobayashi, Tadashi Shibata: A fast self-convergent flash-memory programming scheme for MV and analog data storage. ISCAS (4) 2001: 930-933
7		Toshihiko Yamasaki, Tadashi Shibata: Analog Soft-Pattern-Matching Classifier using Floating-Gate MOS Technology. NIPS 2001: 1131-1138
	1999
6		Tadahiro Ohmi, Tadashi Shibata, Koji Kotani, Tsutomu Nakai, Akira Nakada, Ning Mei Yu, Masahiro Konda, Tatsuo Morimoto, Yuichiro Yamashita: Association hardware for intelligent electronic systems. Systems and Computers in Japan 30(12): 52-62 (1999)
	1998
5		Tadashi Shibata: Functional-Device-Based VLSI for Intelligent Electronic Systems. ISMVL 1998: 317-
4		Tadashi Shibata: Right brain computing hardware: a psychological brain model on silicon. KES (3) 1998: 429-435
3		Tatsuo Morimoto, Tadashi Shibata, Tadahiro Ohmi: Neuron-MOS continuous-time winner-take-all circuit for intelligent data processing. KES (3) 1998: 436-441
	1995
2		Tadashi Shibata, Tsutomu Nakai, Tatsuo Morimoto, Ryu Kaihara, Takeo Yamashita, Tadahiro Ohmi: Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing. NIPS 1995: 685-691
	1993
1		Tadashi Shibata, Koji Kotani, Takeo Yamashita, Hiroshi Ishii, Hideo Kosaka, Tadahiro Ohmi: Implementing Intelligence on Silicon Using Neuron-Like Functional MOS Transistors. NIPS 1993: 919-926

Coauthor Index

1	Kazuhide Fujita	[25]
2	Hitoshi Hayakawa	[24]
3	Hiroshi Ishii	[1]
4	Kiyoto Ito	[21]
5	Ryu Kaihara	[2]
6	D. Kobayashi	[8]
7	Masahiro Konda	[6]
8	Hideo Kosaka	[1]
9	Koji Kotani	[1] [6]
10	Yoshio Mita	[11] [19]
11	Tatsuo Morimoto	[2] [3] [6]
12	Akira Nakada	[6]
13	Tsutomu Nakai	[2] [6]
14	Yusuke Nakashita	[19]
15	Tomoyuki Nakayama	[18] [20] [26]
16	Toshiyuki Nozawa	[10] [13]
17	Tadahiro Ohmi	[1] [2] [3] [6] [10] [13]
18	A. Suzuki	[8]
19	T. Taguchi	[12]
20	Kenji Takada	[14]
21	Norihiro Takahashi	[25] [27]
22	Chihiro Tanikawa	[14]
23	Benjamas Tongprasit	[21] [22]
24	Masayuki Umejima	[17]
25	Keng Hoong Wee	[10] [13]
26	Huaiyu Xu	[11]
27	Masakazu Yagi	[14] [15]
28	Hideo Yamasaki	[15] [16]
29	Toshihiko Yamasaki	[7] [8] [9] [12] [17] [18] [20] [26]
30	Takeo Yamashita	[1] [2]
31	Y. Yamashita	[10]
32	Yuichiro Yamashita	[6]
33	T. Yonezawa	[10] [13]
34	Ning Mei Yu	[6]

Colors in the list of coauthors