Youngsoo Shin

	2009
41		Insup Shin, Seungwhun Paik, Youngsoo Shin: Register allocation for high-level synthesis using dual supply voltages. DAC 2009: 937-942
40		Seungwhun Paik, Insup Shin, Youngsoo Shin: HLS-l: High-level synthesis of high performance latch-based circuits. DATE 2009: 1112-1117
39		Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin: Frequency and yield optimization using power gates in power-constrained designs. ISLPED 2009: 121-126
38		Youngsoo Shin, Seungwhun Paik, Hyung-Ock Kim: Semicustom Design of Zigzag Power-Gated Circuits in Standard Cell Elements. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 327-339 (2009)
37		Eunjoo Choi, Changsik Shin, Youngsoo Shin: ssr HLShbox-ssr pg: High-Level Synthesis of Power-Gated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 451-456 (2009)
	2008
36		Jinseob Jeong, Seungwhun Paik, Youngsoo Shin: Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation. ASP-DAC 2008: 629-634
35		Seungwhun Paik, Youngsoo Shin: Multiobjective optimization of sleep vector for zigzag power-gated circuits in standard cell elements. DAC 2008: 600-605
34		Hyein Lee, Seungwhun Paik, Youngsoo Shin: Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits. ICCAD 2008: 224-229
33		Eunjoo Choi, Youngsoo Shin: 3-D thermal simulation with dynamic power profiles. ISCAS 2008: 2765-2768
32		Eunjoo Choi, Changsik Shin, Taewhan Kim, Youngsoo Shin: Power-gating-aware high-level synthesis. ISLPED 2008: 39-44
31		Jun Seomun, Jae-Hyun Kim, Youngsoo Shin: Skewed Flip-Flop and Mixed-Vt Gates for Minimizing Leakage in Sequential Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 1956-1968 (2008)
	2007
30		Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi: Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. ASP-DAC 2007: 654-659
29		Jun Seomun, Jaehyun Kim, Youngsoo Shin: Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits. DAC 2007: 103-106
28		Jaehyun Kim, Youngsoo Shin: Minimizing leakage power in sequential circuits by using mixed Vt flip-flops. ICCAD 2007: 797-802
27		Youngsoo Shin, Hyung-Ock Kim: Cell-Based Semicustom Design of Zigzag Power Gating Circuits. ISQED 2007: 527-532
26		Byunghee Choi, Youngsoo Shin: Lookup Table-Based Adaptive Body Biasing of Multiple Macros. ISQED 2007: 533-538
25		Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi: Supply Switching With Ground Collapse: Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits. IEEE Trans. VLSI Syst. 15(7): 758-766 (2007)
	2006
24		Hyung-Ock Kim, Youngsoo Shin: Analysis and optimization of gate leakage current of power gating circuits. ASP-DAC 2006: 565-569
23		Hyung-Ock Kim, Youngsoo Shin, Hyuk Kim, Iksoo Eo: Physical design methodology of power gating circuits for standard-cell-based design. DAC 2006: 109-112
22		Youngsoo Shin, Junghyup Lee: Power Analysis of VLSI Interconnect with RLC Tree Models and Model Reduction. Journal of Circuits, Systems, and Computers 15(3): 399-408 (2006)
	2005
21		Hyung-Ock Kim, Youngsoo Shin: Power-aware slack distribution for hierarchical VLSI design. ISCAS (4) 2005: 4150-4153
20		Youngsoo Shin, Hyung-Ock Kim: Analysis of power consumption in VLSI global interconnects. ISCAS (5) 2005: 4713-4716
19		Subhrajit Bhattacharya, John A. Darringer, Daniel L. Ostapko, Youngsoo Shin: A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. ISQED 2005: 482-487
18		Hiroshi Kawaguchi, Youngsoo Shin, Takayasu Sakurai: /spl mu/ITRON-LP: power-conscious real-time OS based on cooperative voltage scaling for multimedia applications. IEEE Transactions on Multimedia 7(1): 67-74 (2005)
	2004
17		Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu Marculescu: Architecting voltage islands in core-based system-on-a-chip designs. ISLPED 2004: 180-185
	2003
16		Reinaldo A. Bergamaschi, Youngsoo Shin, Nagu R. Dhanwada, Subhrajit Bhattacharya, William E. Dougherty, Indira Nair, John A. Darringer, Sarala Paliwal: SEAS: a system for early analysis of SoCs. CODES+ISSS 2003: 150-155
	2002
15		John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin: Early analysis tools for system-on-a-chip design. IBM Journal of Research and Development 46(6): 691-708 (2002)
	2001
14		Youngsoo Shin, Takayasu Sakurai: Coupling-Driven Bus Design for Low-Power Application-Specific Systems. DAC 2001: 750-753
13		Youngsoo Shin, Takayasu Sakurai: Estimation of power distribution in VLSI interconnects. ISLPED 2001: 370-375
12		Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi: Partial bus-invert coding for power optimization of application-specific systems. IEEE Trans. VLSI Syst. 9(2): 377-383 (2001)
11		Youngsoo Shin, Kiyoung Choi, Young-Hoon Chang: Narrow bus encoding for low-power DSP systems. IEEE Trans. VLSI Syst. 9(5): 656-660 (2001)
	2000
10		Youngsoo Shin, Kiyoung Choi: Narrow bus encoding for low power systems. ASP-DAC 2000: 217-220
9		Youngsoo Shin, Daehong Kim, Kiyoung Choi: Schedulability-driven performance analysis of multiple mode embedded real-time systems. DAC 2000: 495-500
8		Youngsoo Shin, Kiyoung Choi, Takayasu Sakurai: Power Optimization of Real-Time Embedded Systems on Variable Speed Processors. ICCAD 2000: 365-368
	1999
7		Youngsoo Shin, Kiyoung Choi: Power Conscious Fixed Priority Scheduling for Hard Real-Time Systems. DAC 1999: 134-139
	1998
6		Youngsoo Shin, Kiyoung Choi: Rate Assignment for Embedded Reactive Real-Time Systems. EUROMICRO 1998: 10237-
5		Youngsoo Shin, Soo-Ik Chae, Kiyoung Choi: Partial bus-invert coding for power optimization of system level bus. ISLPED 1998: 127-129
	1997
4		Youngsoo Shin, Kiyoung Choi: Enforcing Schedulability of Multi-Task Systems by Hardware-Software Codesign. CODES 1997: 3-8
	1996
3		Youngsoo Shin, Kiyoung Choi: Software synthesis through task decomposition by dependency analysis. ICCAD 1996: 98-104
	1995
2		Yongjoo Kim, Kyuseok Kim, Youngsoo Shin, Taekyoon Ahn, Wonyong Sung, Kiyoung Choi, Soonhoi Ha: An integrated hardware-software cosimulation environment for heterogeneous systems prototyping. ASP-DAC 1995
1		Yongjoo Kim, Youngsoo Shin, Kyuseok Kim, Jae-Hee Won, Kiyoung Choi: Efficient Prototyping System Based on Incremental Design and Module-by-Module Verification. ISCAS 1995: 924-927

Coauthor Index

1	Taekyoon Ahn	[2]
2	Reinaldo A. Bergamaschi	[15] [16]
3	Subhrajit Bhattacharya	[15] [16] [19]
4	Daniel Brand	[15]
5	Soo-Ik Chae	[5] [12]
6	Young-Hoon Chang	[11]
7	Byunghee Choi	[26]
8	Eunjoo Choi	[32] [33] [37]
9	Jung Yun Choi	[25] [30]
10	Ken Choi	[39]
11	Kiyoung Choi	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
12	John A. Darringer	[15] [16] [19]
13	Nagu R. Dhanwada	[16] [17]
14	William E. Dougherty	[16]
15	Iksoo Eo	[23]
16	Soonhoi Ha	[2]
17	Tae Hee Han	[39]
18	Sewan Heo	[25] [30]
19	Andreas Herkersdorf	[15]
20	Jingcao Hu	[17]
21	Jinseob Jeong	[36]
22	Hiroshi Kawaguchi	[18]
23	Daehong Kim	[9]
24	Hyuk Kim	[23]
25	Hyung-Ock Kim	[20] [21] [23] [24] [25] [27] [30] [38]
26	Jae-Hyun Kim	[31]
27	Jaehyun Kim	[28] [29]
28	Kyuseok Kim	[1] [2]
29	Nam Sung Kim	[39]
30	Taewhan Kim	[32]
31	Yongjoo Kim	[1] [2]
32	Hyein Lee	[34]
33	Junghyup Lee	[22]
34	Jungseob Lee	[39]
35	Radu Marculescu	[17]
36	Joseph K. Morrell	[15]
37	Indira Nair	[15] [16]
38	Daniel L. Ostapko	[19]
39	Seungwhun Paik	[34] [35] [36] [38] [40] [41]
40	Sarala Paliwal	[16]
41	Patricia Sagmeister	[15]
42	Takayasu Sakurai	[8] [13] [14] [18]
43	Jun Seomun	[29] [31] [39]
44	Changsik Shin	[32] [37]
45	Insup Shin	[40] [41]
46	Abhishek A. Sinkar	[39]
47	Wonyong Sung	[2]
48	Jae-Hee Won	[1]

Colors in the list of coauthors