Amit Singh

	2009
16		Sayali Kulkarni, Amit Singh, Ganesh Ramakrishnan, Soumen Chakrabarti: Collective annotation of Wikipedia entities in web text. KDD 2009: 457-466
	2006
15		Sanket Shah, Tularam M. Bansod, Amit Singh: Design and Implementation of a Network Processor Based 10Gbps Network Traffic Generator. ICDCN 2006: 269-275
	2003
14		Amit Singh, Hakan Ferhatosmanoglu, Ali Saman Tosun: High dimensional reverse nearest neighbor queries. CIKM 2003: 91-98
13		Amit Singh, Arindam Mukherjee, Luca Macchiarulo, Malgorzata Marek-Sadowska: PITIA: an FPGA for throughput-intensive applications. IEEE Trans. VLSI Syst. 11(3): 354-363 (2003)
	2002
12		Amit Singh, Malgorzata Marek-Sadowska: Efficient circuit clustering for area and power reduction in FPGAs. FPGA 2002: 59-66
11		Amit Singh, Malgorzata Marek-Sadowska: FPGA interconnect planning. SLIP 2002: 23-30
10		Amit Singh, Ganapathy Parthasarathy, Malgorzata Marek-Sadowska: Efficient circuit clustering for area and power reduction in FPGAs. ACM Trans. Design Autom. Electr. Syst. 7(4): 643-663 (2002)
	2001
9		Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: Latency and Latch Count Minimization in Wave Steered Circuits. DAC 2001: 383-388
8		Nobuo Funabiki, Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: A Global Routing Technique for Wave-Steering Design Methodology. DSD 2001: 430-437
7		Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska: Interconnect pipelining in a throughput-intensive FPGA architecture. FPGA 2001: 153-160
6		Amit Singh, Ganapathy Parthasarathy, Malgorzata Marek-Sadowska: Interconnect Resource-Aware Placement for Hierarchical FPGAs. ICCAD 2001: 132-136
5		Ganapathy Parthasarathy, Malgorzata Marek-Sadowska, Arindam Mukherjee, Amit Singh: Interconnect complexity-aware FPGA placement using Rent's rule. SLIP 2001: 115-121
	2000
4		Steven Trimberger, Raymond Pang, Amit Singh: A 12 Gbps DES Encryptor/Decryptor Core in an FPGA. CHES 2000: 156-163
3		Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska: A novel high throughput reconfigurable FPGA architecture. FPGA 2000: 22-29
2		José Carlos Brustoloni, Eran Gabber, Abraham Silberschatz, Amit Singh: Signaled Receiver Processing. USENIX Annual Technical Conference, General Track 2000: 211-224
	1999
1		Amit Singh, Malgorzata Marek-Sadowska: Circuit clustering using graph coloring. ISPD 1999: 164-169

Coauthor Index

1	Tularam M. Bansod	[15]
2	José Carlos Brustoloni (Jose Carlos Brustoloni)	[2]
3	Soumen Chakrabarti	[16]
4	Hakan Ferhatosmanoglu	[14]
5	Nobuo Funabiki	[8]
6	Eran Gabber	[2]
7	Sayali Kulkarni	[16]
8	Luca Macchiarulo	[3] [13]
9	Malgorzata Marek-Sadowska	[1] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13]
10	Arindam Mukherjee	[3] [5] [7] [8] [9] [13]
11	Raymond Pang	[4]
12	Ganapathy Parthasarathy	[5] [6] [10]
13	Ganesh Ramakrishnan	[16]
14	Sanket Shah	[15]
15	Abraham Silberschatz (Avi Silberschatz)	[2]
16	Ali Saman Tosun	[14]
17	Steven Trimberger	[4]

Colors in the list of coauthors