Satish Sivaswamy Coauthor index DBLP Vis pubzone.org

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DBLP keys2009
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSatish Sivaswamy, Kia Bazargan, Marc D. Riedel: Estimation and optimization of reliability of noisy digital circuits. ISQED 2009: 213-219
2008
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSatish Sivaswamy, Kia Bazargan: Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs. TRETS 1(1): (2008)
2007
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSatish Sivaswamy, Kia Bazargan: Variation-aware routing for FPGAs. FPGA 2007: 71-79
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSatish Sivaswamy, Kia Bazargan: Statistical Generic And Chip-Specific Skew Assignment for Improving Timing Yield of FPGAs. FPL 2007: 429-434
2006
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh: Statistical Analysis and Design of HARP FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2088-2102 (2006)
2005
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSatish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh: HARP: hard-wired routing pattern FPGAs. FPGA 2005: 21-29

Coauthor Index

1Cristinel Ababei [1] [2]
2Kia Bazargan [1] [2] [3] [4] [5] [6]
3Elaheh Bozorgzadeh (Eli Bozorgzadeh) [1] [2]
4Ryan Kastner [1] [2]
5Marc D. Riedel [6]
6Gang Wang [1] [2]

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