 | 2009 |
| 10 |  | Martin Thuresson,
Magnus Själander,
Per Stenström:
A Flexible Code Compression Scheme Using Partitioned Look-Up Tables.
HiPEAC 2009: 95-109 |
| 9 |  | Tung Thanh Hoang,
Magnus Själander,
Per Larsson-Edefors:
Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements.
IPDPS 2009: 1-7 |
| 8 |  | Martin Thuresson,
Magnus Själander,
Magnus Björk,
Lars J. Svensson,
Per Larsson-Edefors,
Per Stenström:
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing.
Signal Processing Systems 57(1): 5-19 (2009) |
| 2008 |
| 7 |  | Magnus Själander,
Andrei Terechko,
Marc Duranton:
A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures.
DSD 2008: 149-157 |
| 6 |  | Md. Mafijul Islam,
Magnus Själander,
Per Stenström:
Early detection and bypassing of trivial operations to improve energy efficiency of processors.
Microprocessors and Microsystems - Embedded Hardware Design 32(4): 183-196 (2008) |
| 2007 |
| 5 |  | Martin Thuresson,
Magnus Själander,
Magnus Björk,
Lars J. Svensson,
Per Larsson-Edefors,
Per Stenström:
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing.
ICSAMOS 2007: 18-25 |
| 4 |  | Magnus Själander,
Per Larsson-Edefors,
Magnus Björk:
A Flexible Datapath Interconnect for Embedded Applications.
ISVLSI 2007: 15-20 |
| 2006 |
| 3 |  | Henrik Eriksson,
Per Larsson-Edefors,
Mary Sheeran,
Magnus Själander,
D. Johansson,
M. Scholin:
Multiplier reduction tree with logarithmic logic depth and regular connectivity.
ISCAS 2006 |
| 2005 |
| 2 |  | Magnus Själander,
Mindaugas Drazdziulis,
Per Larsson-Edefors,
Henrik Eriksson:
A low-leakage twin-precision multiplier using reconfigurable power gating.
ISCAS (2) 2005: 1654-1657 |
| 2004 |
| 1 |  | Magnus Själander,
Henrik Eriksson,
Per Larsson-Edefors:
An Efficient Twin-Precision Multiplier.
ICCD 2004: 30-33 |