| 2008 |
|---|
| 128 | EE | Hyondeuk Kim,
HoonSang Jin,
Kavita Ravi,
Petr Spacek,
John Pierce,
Robert P. Kurshan,
Fabio Somenzi:
Application of Formal Word-Level Analysis to Constrained Random Simulation.
CAV 2008: 487-490 |
| 127 | EE | Saqib Sohail,
Fabio Somenzi,
Kavita Ravi:
A Hybrid Algorithm for LTL Games.
VMCAI 2008: 309-323 |
| 2007 |
|---|
| 126 | EE | HyoJung Han,
Fabio Somenzi:
Alembic: An Efficient Algorithm for CNF Preprocessing.
DAC 2007: 582-587 |
| 125 | EE | Roderick Bloem,
Marco Roveri,
Fabio Somenzi:
Preface.
Electr. Notes Theor. Comput. Sci. 174(4): 1 (2007) |
| 2006 |
|---|
| 124 | EE | Mohammad Awedh,
Fabio Somenzi:
Automatic invariant strengthening to prove properties in bounded model checking.
DAC 2006: 1073-1076 |
| 123 | EE | Kuntal Nanshi,
Fabio Somenzi:
Guiding simulation with increasingly refined abstract traces.
DAC 2006: 737-742 |
| 122 | EE | HoonSang Jin,
Fabio Somenzi:
Strong conflict analysis for propositional satisfiability.
DATE 2006: 818-823 |
| 121 | EE | Hyondeuk Kim,
Fabio Somenzi:
Finite Instantiations for Integer Difference Logic.
FMCAD 2006: 31-38 |
| 120 | EE | David Ward,
Fabio Somenzi:
Decomposing image computation for symbolic reachability analysis using control flow information.
ICCAD 2006: 779-785 |
| 119 | EE | Bing Li,
Fabio Somenzi:
Efficient Abstraction Refinement in Interpolation-Based Unbounded Model Checking.
TACAS 2006: 227-241 |
| 118 | EE | Mohammad Awedh,
Fabio Somenzi:
Termination Criteria for Bounded Model Checking: Extensions and Comparison.
Electr. Notes Theor. Comput. Sci. 144(1): 51-66 (2006) |
| 117 | EE | Roderick Bloem,
Harold N. Gabow,
Fabio Somenzi:
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps.
Formal Methods in System Design 28(1): 37-56 (2006) |
| 116 | EE | Chao Wang,
Roderick Bloem,
Gary D. Hachtel,
Kavita Ravi,
Fabio Somenzi:
Compositional SCC Analysis for Language Emptiness.
Formal Methods in System Design 28(1): 5-36 (2006) |
| 115 | EE | Chao Wang,
Bing Li,
HoonSang Jin,
Gary D. Hachtel,
Fabio Somenzi:
Improving Ariadne's Bundle by Following Multiple Threads in Abstraction Refinement.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2297-2316 (2006) |
| 2005 |
|---|
| 114 | EE | David Ward,
Fabio Somenzi:
Automatic Generation of Hints for Symbolic Traversal.
CHARME 2005: 207-221 |
| 113 | EE | HoonSang Jin,
Fabio Somenzi:
Prime clauses for fast enumeration of satisfying assignments to boolean circuits.
DAC 2005: 750-753 |
| 112 | EE | HoonSang Jin,
HyoJung Han,
Fabio Somenzi:
Efficient Conflict Analysis for Finding All Satisfying Assignments of a Boolean Circuit.
TACAS 2005: 287-300 |
| 111 | EE | HoonSang Jin,
Fabio Somenzi:
An Incremental Algorithm to Check Satisfiability for Bounded Model Checking.
Electr. Notes Theor. Comput. Sci. 119(2): 51-65 (2005) |
| 110 | EE | Bing Li,
Chao Wang,
Fabio Somenzi:
Abstraction refinement in symbolic model checking using satisfiability as the only decision procedure.
STTT 7(2): 143-155 (2005) |
| 2004 |
|---|
| 109 | EE | HoonSang Jin,
Mohammad Awedh,
Fabio Somenzi:
CirCUs: A Satisfiability Solver Geared towards Bounded Model Checking.
CAV 2004: 519-522 |
| 108 | EE | Mohammad Awedh,
Fabio Somenzi:
Proving More Properties with Bounded Model Checking.
CAV 2004: 96-108 |
| 107 | EE | Chao Wang,
HoonSang Jin,
Gary D. Hachtel,
Fabio Somenzi:
Refining the SAT decision ordering for bounded model checking.
DAC 2004: 535-538 |
| 106 | EE | Mohammad Awedh,
Fabio Somenzi:
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States.
FMCAD 2004: 230-244 |
| 105 | EE | Bing Li,
Fabio Somenzi:
Efficient computation of small abstraction refinements.
ICCAD 2004: 518-525 |
| 104 | EE | Chao Wang,
Gary D. Hachtel,
Fabio Somenzi:
Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking.
ICCD 2004: 112-118 |
| 103 | EE | HoonSang Jin,
Fabio Somenzi:
CirCUs: A Hybrid Satisfiability Solver.
SAT 2004 |
| 102 | EE | HoonSang Jin,
Fabio Somenzi:
CirCUs: A Hybrid Satisfiability Solver.
SAT (Selected Papers 2004: 211-223 |
| 101 | EE | Kavita Ravi,
Fabio Somenzi:
Minimal Assignments for Bounded Model Checking.
TACAS 2004: 31-45 |
| 100 | EE | HoonSang Jin,
Kavita Ravi,
Fabio Somenzi:
Fate and free will in error traces.
STTT 6(2): 102-116 (2004) |
| 2003 |
|---|
| 99 | | Warren A. Hunt Jr.,
Fabio Somenzi:
Computer Aided Verification, 15th International Conference, CAV 2003, Boulder, CO, USA, July 8-12, 2003, Proceedings
Springer 2003 |
| 98 | EE | Fabio Somenzi:
The Charme of Abstract Entities.
CHARME 2003: 2 |
| 97 | EE | Sankar Gurumurthy,
Orna Kupferman,
Fabio Somenzi,
Moshe Y. Vardi:
On Complementing Nondeterministic Büchi Automata.
CHARME 2003: 96-110 |
| 96 | EE | Nikhil Jayakumar,
Mitra Purandare,
Fabio Somenzi:
Dos and don'ts of CTL state coverage estimation.
DAC 2003: 292-295 |
| 95 | EE | Rajesh K. Gupta,
Shishpal Rawat,
Sandeep K. Shukla,
Brian Bailey,
Daniel K. Beece,
Masahiro Fujita,
Carl Pixley,
John O'Leary,
Fabio Somenzi:
Formal verification - prove it or pitch it.
DAC 2003: 710-711 |
| 94 | EE | Chao Wang,
Gary D. Hachtel,
Fabio Somenzi:
The Compositional Far Side of Image Computation.
ICCAD 2003: 334-341 |
| 93 | EE | Chao Wang,
Bing Li,
HoonSang Jin,
Gary D. Hachtel,
Fabio Somenzi:
Improving Ariadneýs Bundle by Following Multiple Threads in Abstraction Refinement.
ICCAD 2003: 408-415 |
| 92 | EE | Bing Li,
Chao Wang,
Fabio Somenzi:
A satisfiability-based approach to abstraction refinement in model checking.
Electr. Notes Theor. Comput. Sci. 89(4): (2003) |
| 2002 |
|---|
| 91 | EE | Mitra Purandare,
Fabio Somenzi:
Vacuum Cleaning CTL Formulae.
CAV 2002: 485-499 |
| 90 | EE | Sankar Gurumurthy,
Roderick Bloem,
Fabio Somenzi:
Fair Simulation Minimization.
CAV 2002: 610-624 |
| 89 | EE | Fabio Somenzi,
Kavita Ravi,
Roderick Bloem:
Analysis of Symbolic SCC Hull Algorithms.
FMCAD 2002: 88-105 |
| 88 | EE | HoonSang Jin,
Andreas Kuehlmann,
Fabio Somenzi:
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis.
TACAS 2002: 312-326 |
| 87 | EE | HoonSang Jin,
Kavita Ravi,
Fabio Somenzi:
Fate and Free Will in Error Traces.
TACAS 2002: 445-459 |
| 2001 |
|---|
| 86 | EE | Chao Wang,
Roderick Bloem,
Gary D. Hachtel,
Kavita Ravi,
Fabio Somenzi:
Divide and Compose: SCC Refinement for Language Emptiness.
CONCUR 2001: 456-471 |
| 85 | EE | Rolf Drechsler,
Wolfgang Günther,
Fabio Somenzi:
Using lower bounds during dynamic BDD minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 51-57 (2001) |
| 84 | EE | Fabio Somenzi:
Efficient manipulation of decision diagrams.
STTT 3(2): 171-181 (2001) |
| 2000 |
|---|
| 83 | | Fabio Somenzi,
Roderick Bloem:
Efficient Büchi Automata from LTL Formulae.
CAV 2000: 248-263 |
| 82 | EE | In-Ho Moon,
James H. Kukula,
Kavita Ravi,
Fabio Somenzi:
To split or to conjoin: the question in image computation.
DAC 2000: 23-28 |
| 81 | EE | Roderick Bloem,
Kavita Ravi,
Fabio Somenzi:
Symbolic guided search for CTL model checking.
DAC 2000: 29-34 |
| 80 | EE | Gianpiero Cabodi,
Stefano Quer,
Fabio Somenzi:
Optimizing sequential verification by retiming transformations.
DAC 2000: 601-606 |
| 79 | EE | Balakrishna Kumthekar,
Fabio Somenzi:
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs.
DATE 2000: 202-207 |
| 78 | EE | Kavita Ravi,
Roderick Bloem,
Fabio Somenzi:
A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles.
FMCAD 2000: 143-160 |
| 77 | EE | Roderick Bloem,
Harold N. Gabow,
Fabio Somenzi:
An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps.
FMCAD 2000: 37-54 |
| 76 | EE | In-Ho Moon,
Gary D. Hachtel,
Fabio Somenzi:
Border-Block Triangular Form and Conjunction Schedule in Image Computation.
FMCAD 2000: 73-90 |
| 75 | EE | Melvin A. Breuer,
Majid Sarrafzadeh,
Fabio Somenzi:
Fundamental CAD algorithms.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1449-1475 (2000) |
| 74 | EE | Christoph Meinel,
Fabio Somenzi,
Thorsten Theobald:
Linear sifting of decision diagrams and its application insynthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 521-533 (2000) |
| 1999 |
|---|
| 73 | EE | Roderick Bloem,
Kavita Ravi,
Fabio Somenzi:
Efficient Decision Procedures for Model Checking of Linear Time Logic Properties.
CAV 1999: 222-235 |
| 72 | EE | Kavita Ravi,
Fabio Somenzi:
Hints to accelerate Symbolic Traversal.
CHARME 1999: 250-264 |
| 71 | EE | Rajeev K. Ranjan,
Vigyan Singhal,
Fabio Somenzi,
Robert K. Brayton:
Using Combinational Verification for Sequential Circuits.
DATE 1999: 138-144 |
| 70 | EE | In-Ho Moon,
James H. Kukula,
Thomas R. Shiple,
Fabio Somenzi:
Least fixpoint approximations for reachability analysis.
ICCAD 1999: 41-44 |
| 69 | EE | Hiroyuki Higuchi,
Fabio Somenzi:
Lazy group sifting for efficient symbolic state traversal of FSMs.
ICCAD 1999: 45-49 |
| 68 | EE | Kavita Ravi,
Fabio Somenzi:
Efficient Fixpoint Computation for Invariant Checking.
ICCD 1999: 467- |
| 67 | EE | Fabio Somenzi:
Symbolic State Exploration.
Electr. Notes Theor. Comput. Sci. 23(2): (1999) |
| 1998 |
|---|
| 66 | | Christoph Meinel,
Fabio Somenzi,
Thorsten Theobald:
Function Decomposition and Synthesis Using Linear Sifting.
ASP-DAC 1998: 81-86 |
| 65 | EE | Kavita Ravi,
Kenneth L. McMillan,
Thomas R. Shiple,
Fabio Somenzi:
Approximation and Decomposition of Binary Decision Diagrams.
DAC 1998: 445-450 |
| 64 | EE | Balakrishna Kumthekar,
Luca Benini,
Enrico Macii,
Fabio Somenzi:
In-Place Power Optimization for LUT-Based FPGAs.
DAC 1998: 718-721 |
| 63 | EE | Bwolen Yang,
Randal E. Bryant,
David R. O'Hallaron,
Armin Biere,
Olivier Coudert,
Geert Janssen,
Rajeev K. Ranjan,
Fabio Somenzi:
A Performance Study of BDD-Based Model Checking.
FMCAD 1998: 255-289 |
| 62 | EE | Fabrizio Ferrandi,
Alberto Macii,
Enrico Macii,
Massimo Poncino,
Riccardo Scarsi,
Fabio Somenzi:
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.
ICCAD 1998: 235-241 |
| 61 | EE | In-Ho Moon,
Jae-Young Jang,
Gary D. Hachtel,
Fabio Somenzi,
Jun Yuan,
Carl Pixley:
Approximate reachability don't cares for CTL model checking.
ICCAD 1998: 351-358 |
| 60 | EE | Rajeev K. Ranjan,
Vigyan Singhal,
Fabio Somenzi,
Robert K. Brayton:
On the optimization power of retiming and resynthesis transformations.
ICCAD 1998: 402-407 |
| 59 | EE | Enrico Macii,
Massoud Pedram,
Fabio Somenzi:
High-level power modeling, estimation, and optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(11): 1061-1079 (1998) |
| 1997 |
|---|
| 58 | EE | Srilatha Manne,
Dirk Grunwald,
Fabio Somenzi:
Remembrance of Things Past: Locality and Memory in BDDs.
DAC 1997: 196-201 |
| 57 | EE | Christoph Meinel,
Fabio Somenzi,
Thorsten Theobald:
Linear Sifting of Decision Diagrams.
DAC 1997: 202-207 |
| 56 | EE | Enrico Macii,
Massoud Pedram,
Fabio Somenzi:
High-Level Power Modeling, Estimation, and Optimization.
DAC 1997: 504-511 |
| 55 | EE | Balakrishna Kumthekar,
In-Ho Moon,
Fabio Somenzi:
A symbolic algorithm for low-power sequential synthesis.
ISLPED 1997: 56-61 |
| 54 | | R. Iris Bahar,
Erica A. Frohm,
Charles M. Gaona,
Gary D. Hachtel,
Enrico Macii,
Abelardo Pardo,
Fabio Somenzi:
Algebraic Decision Diagrams and Their Applications.
Formal Methods in System Design 10(2/3): 171-206 (1997) |
| 53 | | Gary D. Hachtel,
Fabio Somenzi:
A Symbolic Algorithms for Maximum Flow in 0-1 Networks.
Formal Methods in System Design 10(2/3): 207-219 (1997) |
| 52 | | Shin-ichi Minato,
Fabio Somenzi:
Arithmetic Boolean Expression Manipulator Using BDDs.
Formal Methods in System Design 10(2/3): 221-242 (1997) |
| 51 | EE | R. Iris Bahar,
Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Fabio Somenzi:
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1101-1115 (1997) |
| 50 | EE | Enrico Macii,
Bernard Plessier,
Fabio Somenzi:
Formal verification of digital systems by automatic reduction of data paths.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1136-1156 (1997) |
| 49 | | Christoph Meinel,
Fabio Somenzi,
Thorsten Theobald:
Function Decomposition and Synthesis Using Linear Sifting
Universität Trier, Mathematik/Informatik, Forschungsbericht 97-14: (1997) |
| 1996 |
|---|
| 48 | | Robert K. Brayton,
Gary D. Hachtel,
Alberto L. Sangiovanni-Vincentelli,
Fabio Somenzi,
Adnan Aziz,
Szu-Tsung Cheng,
Stephen A. Edwards,
Sunil P. Khatri,
Yuji Kukimoto,
Abelardo Pardo,
Shaz Qadeer,
Rajeev K. Ranjan,
Shaker Sarwary,
Thomas R. Shiple,
Gitanjali Swamy,
Tiziano Villa:
VIS: A System for Verification and Synthesis.
CAV 1996: 428-432 |
| 47 | | Robert K. Brayton,
Gary D. Hachtel,
Alberto L. Sangiovanni-Vincentelli,
Fabio Somenzi,
Adnan Aziz,
Szu-Tsung Cheng,
Stephen A. Edwards,
Sunil P. Khatri,
Yuji Kukimoto,
Abelardo Pardo,
Shaz Qadeer,
Rajeev K. Ranjan,
Shaker Sarwary,
Thomas R. Shiple,
Gitanjali Swamy,
Tiziano Villa:
VIS.
FMCAD 1996: 248-256 |
| 46 | | Kavita Ravi,
Abelardo Pardo,
Gary D. Hachtel,
Fabio Somenzi:
Modular Verification of Multipliers.
FMCAD 1996: 49-63 |
| 45 | EE | Woohyuk Lee,
Abelardo Pardo,
Jae-Young Jang,
Gary D. Hachtel,
Fabio Somenzi:
Tearing based automatic abstraction for CTL model checking.
ICCAD 1996: 76-81 |
| 44 | EE | R. Iris Bahar,
M. Burns,
Gary D. Hachtel,
Enrico Macii,
H. Shin,
Fabio Somenzi:
Symbolic computation of logic implications for technology-dependent low-power synthesis.
ISLPED 1996: 163-168 |
| 43 | EE | Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Massimo Poncino,
Fabio Somenzi:
Automatic state space decomposition for approximate FSM traversal based on circuit analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1451-1464 (1996) |
| 42 | EE | Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Bernard Plessier,
Fabio Somenzi:
Algorithms for approximate FSM traversal based on state space decomposition.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1465-1478 (1996) |
| 41 | EE | Gary D. Hachtel,
Enrico Macii,
Abelardo Pardo,
Fabio Somenzi:
Markovian analysis of large finite state machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(12): 1479-1493 (1996) |
| 40 | | Christoph Meinel,
Fabio Somenzi,
Thorsten Theobald:
Linear Sifting of Decision Diagrams
Universität Trier, Mathematik/Informatik, Forschungsbericht 96-42: (1996) |
| 1995 |
|---|
| 39 | EE | Srilatha Manne,
Abelardo Pardo,
R. Iris Bahar,
Gary D. Hachtel,
Fabio Somenzi,
Enrico Macii,
Massimo Poncino:
Computing the Maximum Power Cycles of a Sequential Circuit.
DAC 1995: 23-28 |
| 38 | EE | Kavita Ravi,
Fabio Somenzi:
High-density reachability analysis.
ICCAD 1995: 154-158 |
| 37 | EE | R. Iris Bahar,
Fabio Somenzi:
Boolean techniques for low power driven re-synthesis.
ICCAD 1995: 428-432 |
| 36 | EE | Shipra Panda,
Fabio Somenzi:
Who are the variables in your neighborhood.
ICCAD 1995: 74-77 |
| 35 | EE | Abelardo Pardo,
R. Iris Bahar,
Srilatha Manne,
Peter Feldmann,
Gary D. Hachtel,
Fabio Somenzi:
CMOS dynamic power estimation based on collapsible current source transistor modeling.
ISLPD 1995: 111-116 |
| 1994 |
|---|
| 34 | EE | Gary D. Hachtel,
Enrico Macii,
Abelardo Pardo,
Fabio Somenzi:
Probabilistic Analysis of Large Finite State Machines.
DAC 1994: 270-275 |
| 33 | | Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Massimo Poncino,
Fabio Somenzi:
A State Space Decomposition Algorithm for Approximate FSM Traversal.
EDAC-ETC-EUROASIC 1994: 137-141 |
| 32 | | Gary D. Hachtel,
Enrico Macii,
Abelardo Pardo,
Fabio Somenzi:
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine.
EDAC-ETC-EUROASIC 1994: 214-218 |
| 31 | | R. Iris Bahar,
Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Fabio Somenzi:
Timing Analysis of Combinational Circuits using ADD's.
EDAC-ETC-EUROASIC 1994: 625-629 |
| 30 | EE | R. Iris Bahar,
Gary D. Hachtel,
Enrico Macii,
Fabio Somenzi:
A symbolic method to reduce power consumption of circuits containing false paths.
ICCAD 1994: 368-371 |
| 29 | EE | Shipra Panda,
Fabio Somenzi,
Bernard Plessier:
Symmetry detection and dynamic variable ordering of decision diagrams.
ICCAD 1994: 628-631 |
| 28 | EE | Gary D. Hachtel,
Mariano Hermida de la Rica,
Abelardo Pardo,
Massimo Poncino,
Fabio Somenzi:
Re-encoding sequential circuits to reduce power dissipation.
ICCAD 1994: 70-73 |
| 27 | | Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Massimo Poncino,
Fabio Somenzi:
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis.
ICCD 1994: 236-239 |
| 26 | | Bernard Plessier,
Gary D. Hachtel,
Fabio Somenzi:
Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms.
Formal Methods in System Design 4(2): 167-185 (1994) |
| 25 | EE | June-Kyung Rho,
Gary D. Hachtel,
Fabio Somenzi,
Reily M. Jacoby:
Exact and heuristic algorithms for the minimization of incompletely specified state machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(2): 167-177 (1994) |
| 24 | EE | June-Kyung Rho,
Fabio Somenzi:
Don't care sequences and the optimization of interacting finite state machines.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(7): 865-874 (1994) |
| 1993 |
|---|
| 23 | | June-Kyung Rho,
Fabio Somenzi:
Automatic Generation of Network Invariants for the Verification of Iterative Sequential Systems.
CAV 1993: 123-137 |
| 22 | EE | Hyunwoo Cho,
Gary D. Hachtel,
Enrico Macii,
Bernard Plessier,
Fabio Somenzi:
Algorithms for Approximate FSM Traversal.
DAC 1993: 25-30 |
| 21 | EE | June-Kyung Rho,
Fabio Somenzi,
Carl Pixley:
Minimum Length Synchronizing Sequences of Finite State Machine.
DAC 1993: 463-468 |
| 20 | EE | R. Iris Bahar,
Erica A. Frohm,
Charles M. Gaona,
Gary D. Hachtel,
Enrico Macii,
Abelardo Pardo,
Fabio Somenzi:
Algebraic decision diagrams and their applications.
ICCAD 1993: 188-191 |
| 19 | EE | Gary D. Hachtel,
Fabio Somenzi:
A symbolic algorithm for maximum flow in 0-1 networks.
ICCAD 1993: 403-406 |
| 18 | EE | Hyunwoo Cho,
Gary D. Hachtel,
Fabio Somenzi:
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(7): 935-945 (1993) |
| 1992 |
|---|
| 17 | EE | June-Kyung Rho,
Fabio Somenzi:
Inductive Verification of Iterative Systems.
DAC 1992: 628-633 |
| 16 | EE | Enrico Macii,
Bernard Plessier,
Fabio Somenzi:
Verification of systems containing counters.
ICCAD 1992: 179-182 |
| 15 | EE | Seh-Woong Jeong,
Fabio Somenzi:
A new algorithm for the binate covering problem and its application to the minimization of Boolean relations.
ICCAD 1992: 417-420 |
| 14 | | June-Kyung Rho,
Fabio Somenzi:
The Role of Prime Compatibles in the Minimization of Finite State Machines.
ICCD 1992: 324-327 |
| 1991 |
|---|
| 13 | | June-Kyung Rho,
Gary D. Hachtel,
Fabio Somenzi:
Don't Care Sequences and the Optimization of Interacting Finite State Machines.
ICCAD 1991: 418-421 |
| 12 | | Seh-Woong Jeong,
Bernard Plessier,
Gary D. Hachtel,
Fabio Somenzi:
Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms.
ICCAD 1991: 464-467 |
| 11 | | Seon-Woong Jeong,
Bernard Plessier,
Gary D. Hachtel,
Fabio Somenzi:
Variable Ordering and Selection for FSM Traversal.
ICCAD 1991: 476-479 |
| 10 | | Hyunwoo Cho,
Gary D. Hachtel,
Fabio Somenzi:
Redundancy Identification and Removal Based on Implicit State Enumeration.
ICCD 1991: 77-80 |
| 9 | | Hyunwoo Cho,
Gary D. Hachtel,
Fabio Somenzi:
Fast Sequential ATPG Based on Implicit State Enumeration.
ITC 1991: 67-74 |
| 1990 |
|---|
| 8 | | Hyunwoo Cho,
Gary D. Hachtel,
Seh-Woong Jeong,
Bernard Plessier,
Eric M. Schwarz,
Fabio Somenzi:
ATPG Aspects of FSM Verification.
ICCAD 1990: 134-137 |
| 7 | | Bill Lin,
Fabio Somenzi:
Minimization of Symbolic Relations.
ICCAD 1990: 88-91 |
| 1988 |
|---|
| 6 | EE | Silvano Gai,
Pier Luca Montessoro,
Fabio Somenzi:
The Performance of the Concurrent Fault Simulation Algorithms in MOZART.
DAC 1988: 692-697 |
| 5 | EE | Silvano Gai,
Pier Luca Montessoro,
Fabio Somenzi:
MOZART: a concurrent multilevel simulator.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(9): 1005-1016 (1988) |
| 1987 |
|---|
| 4 | EE | Silvano Gai,
Fabio Somenzi,
M. Spalla:
Fast and Coherent Simulation with Zero Delay Elements.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(1): 85-93 (1987) |
| 3 | EE | Silvano Gai,
Fabio Somenzi,
Ernst Ulrich:
Advances in Concurrent Multilevel Simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 1006-1012 (1987) |
| 1985 |
|---|
| 2 | | Fabio Somenzi,
Silvano Gai,
Marco Mezzalama,
Paolo Prinetto:
Testing Strategy and Technique for Macro-Based Circuits.
IEEE Trans. Computers 34(1): 85-90 (1985) |
| 1984 |
|---|
| 1 | EE | Fabio Somenzi,
Silvano Gai,
Marco Mezzalama,
Paolo Prinetto:
PART: Programmable Array Testing Based on a Partitioning Algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems 3(2): 142-149 (1984) |
