 | 2007 |
|---|
| 8 |       | Vassos Soteriou,
Li-Shiuan Peh:
Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks.
IEEE Trans. Parallel Distrib. Syst. 18(3): 393-408 (2007) |
| 7 | | Vassos Soteriou,
Noel Eisley,
Hangsheng Wang,
Bin Li,
Li-Shiuan Peh:
Polaris: A System-Level Roadmapping Toolchain for On-Chip Interconnection Networks.
IEEE Trans. VLSI Syst. 15(8): 855-868 (2007) |
| 6 | | Vassos Soteriou,
Noel Eisley,
Li-Shiuan Peh:
Software-directed power-aware interconnection networks.
TACO 4(1): (2007) |
| 2006 |
|---|
| 5 | | Noel Eisley,
Vassos Soteriou,
Li-Shiuan Peh:
High-level power analysis for multi-core chips.
CASES 2006: 389-400 |
| 4 | | Vassos Soteriou,
Noel Eisley,
Hangsheng Wang,
Bin Li,
Li-Shiuan Peh:
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks.
ICCD 2006 |
| 3 | | Vassos Soteriou,
Hangsheng Wang,
Li-Shiuan Peh:
A Statistical Traffic Model for On-Chip Interconnection Networks.
MASCOTS 2006: 104-116 |
| 2005 |
|---|
| 2 | | Vassos Soteriou,
Noel Eisley,
Li-Shiuan Peh:
Software-directed power-aware interconnection networks.
CASES 2005: 274-285 |
| 2004 |
|---|
| 1 | | Vassos Soteriou,
Li-Shiuan Peh:
Design-Space Exploration of Power-Aware On/Off Interconnection Networks.
ICCD 2004: 510-517 |
