Rainer G. Spallek

	2009
27		Jens Braunes, Rainer G. Spallek: Generating the trace qualification configuration for MCDS from a high level language. DATE 2009: 1560-1563
	2008
26		Uwe Brinkschulte, Theo Ungerer, Christian Hochberger, Rainer G. Spallek: Architecture of Computing Systems - ARCS 2008, 21st International Conference, Dresden, Germany, February 25-28, 2008, Proceedings Springer 2008
25		Steffen Köhler, Jan Schirok, Jens Braunes, Rainer G. Spallek: Efficiency of Dynamic Reconfigurable Datapath Extensions -- A Case Study. ARC 2008: 296-301
24		Thomas Preußer, Rainer G. Spallek: Java-Programmed Bootloading in Spite of Load-Time Code Patching on a Minimal Embedded Bytecode Processor. ESA 2008: 260-264
	2007
23		J. Schneider, M. Naggatz, Rainer G. Spallek: Implementation of Architecture Concepts for Hardware Agent Systems. CIT 2007: 823-828
22		Martin Zabel, Thomas B. Preuber, Peter Reichel, Rainer G. Spallek: Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture. DSD 2007: 59-62
21		Thomas Preußer, Martin Zabel, Rainer G. Spallek: Enabling constant-time interface method dispatch in embedded Java processors. JTRES 2007: 196-205
20		Thomas Preußer, Martin Zabel, Rainer G. Spallek: Bump-pointer method caching for embedded Java processors. JTRES 2007: 206-210
	2006
19		Jens Braunes, Rainer G. Spallek: A Compiler-Oriented Architecture Description for Reconfigurable Systems. ARC 2006: 443-448
18		Steffen Köhler, Martin Zimmerling, Martin Zabel, Rainer G. Spallek: Prototyping and Application Development Framework for Dynamically Reconfigurable DSP Architectures. ARCS Workshops 2006: 142-151
17		Thomas B. Preuber, Rainer G. Spallek: Analysis of a Fully-Scalable Digital Fractional Clock Divider. ASAP 2006: 173-177
	2005
16		Jens Braunes, Steffen Köhler, Annett Königsmann, Rainer G. Spallek: Ein Zwischenformat-Profiler für das RECAST-Framework. ARCS Workshops 2005: 33-38
	2004
15		Jens Braunes, Steffen Köhler, Rainer G. Spallek: RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures. ARCS 2004: 156-166
14		Thomas Preußer, Steffen Köhler, Rainer G. Spallek: RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing. ESA/VLSI 2004: 130-135
13		Steffen Köhler, Jens Braunes, Thomas Preußer, Martin Zabel, Rainer G. Spallek: Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration. FPL 2004: 781-790
	2003
12		Sergej Sawitzki, Rainer G. Spallek: Architecture Template and Design Flow to Support Applications Parallelism on Reconfigurable Platforms. FPL 2003: 1119-1122
	2002
11		Sebastian Friebe, Steffen Köhler, Rainer G. Spallek, Henrik Juhr, Klaus Künanz: A Reconfigurable System-on-Chip-Based Fast EDM Process Monitor. FPL 2002: 1164-1167
10		Steffen Köhler, Jens Braunes, Sergej Sawitzki, Rainer G. Spallek: Improving Code Efficiency for Reconfigurable VLIW Processors. IPDPS 2002
	2001
9		Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek: Prototyping Framework for Reconfigurable Processors. FPL 2001: 6-16
	2000
8		Sergej Sawitzki, Rainer G. Spallek, Jens Schönherr, Bernd Straube: Formal Verification for Microprocessors with Extendable Instruction Set. ASAP 2000: 47-55
7		Sergej Sawitzki, Jens Schönherr, Rainer G. Spallek, Bernd Straube: Formal Verification of a Reconfigurable Microprocessor. FPL 2000: 781-784
	1999
6		Sergej Sawitzki, Rainer G. Spallek: A Concept for an Evaluation Framework for Reconfigurable Systems. FPL 1999: 475-480
5		Steffen Köhler, Sergej Sawitzki, Achim Gratz, Rainer G. Spallek: Digital Signal Processing with General Purpose Microprocessors, DSP and Rcinfigurable Logic. IPPS/SPDP Workshops 1999: 706-708
	1998
4		Sergej Sawitzki, Achim Gratz, Rainer G. Spallek: Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays. FPL 1998: 411-415
3		Raimar Falke, Michael Peter, Achim Gratz, Rainer G. Spallek: Common Logging Interface - Ein System zum Sammeln und Verarbeiten von Debugnachrichten in verteilten Umgebungen. Java-Informations-Tage 1998: 354-363
	1997
2		Gert Markwardt, Günter Kemnitz, Rainer G. Spallek: A RISC Processor with Extended Forwarding. ARCS 1997: 163-169
1		Achim Gratz, Rainer G. Spallek: Bewertung von modernen Rechnerarchitekturen hinsichtlich numerischer Simulationen auf heterogenen Plattformen. MMB (Kurzbeiträge) 1997: 51-58

Coauthor Index

1	Jens Braunes	[10] [13] [15] [16] [19] [25] [27]
2	Uwe Brinkschulte	[26]
3	Raimar Falke	[3]
4	Sebastian Friebe	[11]
5	Achim Gratz	[1] [3] [4] [5]
6	Christian Hochberger	[26]
7	Henrik Juhr	[11]
8	Günter Kemnitz	[2]
9	Steffen Köhler	[5] [9] [10] [11] [13] [14] [15] [16] [18] [25]
10	Annett Königsmann	[16]
11	Klaus Künanz	[11]
12	Gert Markwardt	[2]
13	M. Naggatz	[23]
14	Michael Peter	[3]
15	Thomas B. Preuber	[17] [22]
16	Thomas Preußer	[13] [14] [20] [21] [24]
17	Peter Reichel	[22]
18	Sergej Sawitzki	[4] [5] [6] [7] [8] [9] [10] [12]
19	Jan Schirok	[25]
20	J. Schneider	[23]
21	Jens Schönherr	[7] [8]
22	Bernd Straube	[7] [8]
23	Theo Ungerer	[26]
24	Martin Zabel	[13] [18] [20] [21] [22]
25	Martin Zimmerling	[18]

Colors in the list of coauthors