John Gregory Steffan
List of publications from the DBLP Bibliography Server - FAQ
| 2012 | ||
|---|---|---|
| 42 | Chuck (Chengyan) Zhao, J. Gregory Steffan, Cristiana Amza, Allan Kielstra: Compiler Support for Fine-Grain Software-Only Checkpointing. CC 2012: 200-219 | |
| 41 | Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, J. Gregory Steffan: Multi-ported memories for FPGAs via XOR. FPGA 2012: 209-218 | |
| 40 | Charles Eric LaForest, John Gregory Steffan: OCTAVO: an FPGA-centric processor family. FPGA 2012: 219-228 | |
| 2011 | ||
| 39 | Martin Labrecque, J. Gregory Steffan: NetTM: faster and easier synchronization for soft multicores via transactional memory. FPGA 2011: 29-32 | |
| 38 | Danyao Wang, Natalie D. Enright Jerger, J. Gregory Steffan: DART: A programmable architecture for NoC simulation on FPGAs. NOCS 2011: 145-152 | |
| 37 | Mark C. Jeffrey, J. Gregory Steffan: Understanding bloom filter intersection for lazy address-set disambiguation. SPAA 2011: 345-354 | |
| 36 | Jeffrey Kingyens, J. Gregory Steffan: The Potential for a GPU-Like Overlay Architecture for FPGAs. Int. J. Reconfig. Comp. 2011: (2011) | |
| 35 | Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan: Application-specific signatures for transactional memory in soft processors. TRETS 4(3): 21 (2011) | |
| 2010 | ||
| 34 | Andreas Moshovos, J. Gregory Steffan, Kim M. Hazelwood, David R. Kaeli: Proceedings of the CGO 2010, The 8th International Symposium on Code Generation and Optimization, Toronto, Ontario, Canada, April 24-28, 2010 ACM 2010 | |
| 33 | Martin Labrecque, J. Gregory Steffan: The case for hardware transactional memory in software packet processing. ANCS 2010: 37 | |
| 32 | Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan: Application-Specific Signatures for Transactional Memory in Soft Processors. ARC 2010: 42-54 | |
| 31 | Clark Verbrugge, J. Gregory Steffan, Mark G. Stoodley, Kit Barton, Ondrej Lhoták: 9th Workshop on Compiler-Driven Performance. CASCON 2010: 412-413 | |
| 30 | Charles Eric LaForest, J. Gregory Steffan: Efficient multi-ported memories for FPGAs. FPGA 2010: 41-50 | |
| 29 | Steven Birk, J. Gregory Steffan, Jason Helge Anderson: Parallelizing FPGA placement using Transactional Memory. FPT 2010: 61-69 | |
| 28 | Jeffrey Kingyens, J. Gregory Steffan: A GPU-inspired soft processor for high-throughput acceleration. IPDPS Workshops 2010: 1-8 | |
| 27 | Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan: Caliper: a tool to generate precise and closed-loop traffic. SIGCOMM 2010: 445-446 | |
| 2009 | ||
| 26 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: Fine-grain performance scaling of soft vector processors. CASES 2009: 97-106 | |
| 25 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. FPGA 2009: 277 | |
| 24 | Martin Labrecque, J. Gregory Steffan: Fast critical sections via thread scheduling for FPGA-based multithreaded processors. FPL 2009: 18-25 | |
| 23 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: Data parallel FPGA workloads: Software versus hardware. FPL 2009: 51-58 | |
| 2008 | ||
| 22 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: VESPA: portable, scalable, and flexible FPGA-based vector processors. CASES 2008: 61-70 | |
| 21 | Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan: Scaling Soft Processor Systems. FCCM 2008: 195-205 | |
| 20 | Mihai Burcea, J. Gregory Steffan, Cristiana Amza: The potential for variable-granularity access tracking for optimistic parallelism. MSPC 2008: 11-15 | |
| 19 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry: Incrementally parallelizing database transactions with thread-level speculation. ACM Trans. Comput. Syst. 26(1): (2008) | |
| 18 | Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry: Compiler and hardware support for reducing the synchronization of speculative threads. TACO 5(1): (2008) | |
| 2007 | ||
| 17 | Martin Labrecque, J. Gregory Steffan: Improving Pipelined Soft Processors with Multithreading. FPL 2007: 210-215 | |
| 16 | Marek Olszewski, Jeremy Cutler, J. Gregory Steffan: JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory. PACT 2007: 365-375 | |
| 15 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry: CMP Support for Large and Dependent Speculative Threads. IEEE Trans. Parallel Distrib. Syst. 18(8): 1041-1054 (2007) | |
| 14 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: Exploration and Customization of FPGA-Based Soft Processors. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 266-277 (2007) | |
| 13 | Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan: Custom code generation for soft processors. SIGARCH Computer Architecture News 35(3): 9-19 (2007) | |
| 2006 | ||
| 12 | Jeff Da Silva, J. Gregory Steffan: A probabilistic pointer analysis for speculative optimizations. ASPLOS 2006: 416-425 | |
| 11 | Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose: Application-specific customization of soft processor microarchitecture. FPGA 2006: 201-210 | |
| 10 | Stanley L. C. Fung, J. Gregory Steffan: Improving cache locality for thread-level speculation. IPDPS 2006 | |
| 9 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry: Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. ISCA 2006: 216-226 | |
| 2005 | ||
| 8 | Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan: The microarchitecture of FPGA-based soft processors. CASES 2005: 202-212 | |
| 7 | Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry: Optimistic Intra-Transaction Parallelism on Chip Multiprocessors. VLDB 2005: 73-84 | |
| 6 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry: The STAMPede approach to thread-level speculation. ACM Trans. Comput. Syst. 23(3): 253-300 (2005) | |
| 2004 | ||
| 5 | Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry: Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. CGO 2004: 39-52 | |
| 2002 | ||
| 4 | Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry: Compiler optimization of scalar value communication between speculative threads. ASPLOS 2002: 171-183 | |
| 3 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry: Improving Value Communication for Thread-Level Speculation. HPCA 2002: 65-75 | |
| 2000 | ||
| 2 | J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry: A scalable approach to thread-level speculation. ISCA 2000: 1-12 | |
| 1998 | ||
| 1 | J. Gregory Steffan, Todd C. Mowry: The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. HPCA 1998: 2-13 | |
Colors in the list of coauthors
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