 | 2009 |
| 23 |  | Peter Yiannacouras,
J. Gregory Steffan,
Jonathan Rose:
Fine-grain performance scaling of soft vector processors.
CASES 2009: 97-106 |
| 22 |  | Peter Yiannacouras,
J. Gregory Steffan,
Jonathan Rose:
Soft vector processors vs FPGA custom hardware: measuring and reducing the gap.
FPGA 2009: 277 |
| 2008 |
| 21 |  | Peter Yiannacouras,
J. Gregory Steffan,
Jonathan Rose:
VESPA: portable, scalable, and flexible FPGA-based vector processors.
CASES 2008: 61-70 |
| 20 |  | Martin Labrecque,
Peter Yiannacouras,
J. Gregory Steffan:
Scaling Soft Processor Systems.
FCCM 2008: 195-205 |
| 19 |  | Mihai Burcea,
J. Gregory Steffan,
Cristiana Amza:
The potential for variable-granularity access tracking for optimistic parallelism.
MSPC 2008: 11-15 |
| 18 |  | Christopher B. Colohan,
Anastassia Ailamaki,
J. Gregory Steffan,
Todd C. Mowry:
Incrementally parallelizing database transactions with thread-level speculation.
ACM Trans. Comput. Syst. 26(1): (2008) |
| 17 |  | Antonia Zhai,
J. Gregory Steffan,
Christopher B. Colohan,
Todd C. Mowry:
Compiler and hardware support for reducing the synchronization of speculative threads.
TACO 5(1): (2008) |
| 2007 |
| 16 |  | Martin Labrecque,
J. Gregory Steffan:
Improving Pipelined Soft Processors with Multithreading.
FPL 2007: 210-215 |
| 15 |  | Marek Olszewski,
Jeremy Cutler,
J. Gregory Steffan:
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory.
PACT 2007: 365-375 |
| 14 |  | Christopher B. Colohan,
Anastassia Ailamaki,
J. Gregory Steffan,
Todd C. Mowry:
CMP Support for Large and Dependent Speculative Threads.
IEEE Trans. Parallel Distrib. Syst. 18(8): 1041-1054 (2007) |
| 13 |  | Peter Yiannacouras,
J. Gregory Steffan,
Jonathan Rose:
Exploration and Customization of FPGA-Based Soft Processors.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 266-277 (2007) |
| 2006 |
| 12 |  | Jeff Da Silva,
J. Gregory Steffan:
A probabilistic pointer analysis for speculative optimizations.
ASPLOS 2006: 416-425 |
| 11 |  | Peter Yiannacouras,
J. Gregory Steffan,
Jonathan Rose:
Application-specific customization of soft processor microarchitecture.
FPGA 2006: 201-210 |
| 10 |  | Stanley L. C. Fung,
J. Gregory Steffan:
Improving cache locality for thread-level speculation.
IPDPS 2006 |
| 9 |  | Christopher B. Colohan,
Anastassia Ailamaki,
J. Gregory Steffan,
Todd C. Mowry:
Tolerating Dependences Between Large Speculative Threads Via Sub-Threads.
ISCA 2006: 216-226 |
| 2005 |
| 8 |  | Peter Yiannacouras,
Jonathan Rose,
J. Gregory Steffan:
The microarchitecture of FPGA-based soft processors.
CASES 2005: 202-212 |
| 7 |  | Christopher B. Colohan,
Anastassia Ailamaki,
J. Gregory Steffan,
Todd C. Mowry:
Optimistic Intra-Transaction Parallelism on Chip Multiprocessors.
VLDB 2005: 73-84 |
| 6 |  | J. Gregory Steffan,
Christopher B. Colohan,
Antonia Zhai,
Todd C. Mowry:
The STAMPede approach to thread-level speculation.
ACM Trans. Comput. Syst. 23(3): 253-300 (2005) |
| 2004 |
| 5 |  | Antonia Zhai,
Christopher B. Colohan,
J. Gregory Steffan,
Todd C. Mowry:
Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads.
CGO 2004: 39-52 |
| 2002 |
| 4 |  | Antonia Zhai,
Christopher B. Colohan,
J. Gregory Steffan,
Todd C. Mowry:
Compiler optimization of scalar value communication between speculative threads.
ASPLOS 2002: 171-183 |
| 3 |  | J. Gregory Steffan,
Christopher B. Colohan,
Antonia Zhai,
Todd C. Mowry:
Improving Value Communication for Thread-Level Speculation.
HPCA 2002: 65- |
| 2000 |
| 2 |  | J. Gregory Steffan,
Christopher B. Colohan,
Antonia Zhai,
Todd C. Mowry:
A scalable approach to thread-level speculation.
ISCA 2000: 1-12 |
| 1998 |
| 1 |  | J. Gregory Steffan,
Todd C. Mowry:
The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization.
HPCA 1998: 2-13 |