Gordon Steven Coauthor index DBLP Vis pubzone.org

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DBLP keys2002
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLColin Egan, Gordon Steven, Lucian N. Vintan: Cached Two-Level Adaptive Branch Predictors with Multiple Stages. ARCS 2002: 179-194
2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLColin Egan, Gordon Steven, Won Shim, Lucian N. Vintan: Applying Caching to Two-Level Adaptive Branch Prediction. DSD 2001: 186-193
2000
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDaniel Tate, Gordon Steven, Fleur L. Steven: Static Scheduling for Out-of-order Instruction Issue Processors. ACAC 2000: 90-96
1998
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDaniel Tate, Gordon Steven, Paul Findlay: The Impact of a Realistic Cache Structure on a Statically Scheduled Architecture. EUROMICRO 1998: 10325-10328
1996
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRoger Collins, Gordon Steven: Instruction Scheduling for a Superscalar Architecture. EUROMICRO 1996: 643-650
1994
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRoger Collins, Gordon Steven: An explicitly declared delayed-branch mechanism for a superscalar architecture. Microprocessing and Microprogramming 40(10-12): 677-680 (1994)

Coauthor Index

1Roger Collins [1] [2]
2Colin Egan [5] [6]
3Paul Findlay [3]
4Won Shim [5]
5Fleur L. Steven [4]
6Daniel Tate [3] [4]
7Lucian N. Vintan [5] [6]

Colors in the list of coauthors

Copyright © Fri Dec 11 16:01:56 2009 by Michael Ley (ley@uni-trier.de)