| 2006 | ||
|---|---|---|
| 4 | Andrew Stone, Peter Sawyer: Using pre-requirements tracing to investigate requirements based on tactic knowledge. ICSOFT (1) 2006: 139-144 | |
| 3 | EE | Andrew Stone, Peter Sawyer: Exposing Tacit Knowledge via Pre-Requirements Tracing. RE 2006: 346-347 |
| 2000 | ||
| 2 | EE | Andrew Stone, Elias S. Manolakos: Minimal Complexity Hierarchical Loop Representations of SFG Processors for Optimal High Level Synthesis. ASAP 2000: 92-102 |
| 1 | EE | Andrew Stone, Elias S. Manolakos: DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array Architectures. VLSI Signal Processing 24(1): 99-120 (2000) |
| 1 | Elias S. Manolakos | [1] [2] |
| 2 | Peter Sawyer | [3] [4] |