Charles E. Stroud

	2009
54		Bradley F. Dutton, Charles E. Stroud: Single Event Upset Detection and Correction in Virtex-4 and Virtex-5 FPGAs. CATA 2009: 57-62
53		Brooks R. Garrison, Daniel T. Milton, Charles E. Stroud: Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays. CATA 2009: 63-68
52		Bradley F. Dutton, Charles E. Stroud: Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs. ESA 2009: 149-155
51		Bradley F. Dutton, Mustafa Ali, Charles E. Stroud, John Sunwoo: Embedded Processor Based Fault Injection and SEU Emulation for FPGAs. ESA 2009: 183-189
50		George Starr, J. M. Wersinger, Richard Chapman, Lloyd Riggs, Victor Nelson, John Klingelhoeffer, Charles E. Stroud: Application of Embedded Systems in Low Earth Orbit for Measurement of Ionospheric Anomalies. ESA 2009: 9-15
	2008
49		Laung-Terng Wang, Charles E. Stroud, Kwang-Ting (Tim) Cheng: Logic Testing. Wiley Encyclopedia of Computer Science and Engineering 2008
	2007
48		Jie Qin, Charles E. Stroud, Foster F. Dai: Noise Figure Measurement Using Mixed-Signal BIST. ISCAS 2007: 2180-2183
47		John M. Emmert, Charles E. Stroud, Miron Abramovici: Online Fault Tolerance for FPGA Logic Blocks. IEEE Trans. VLSI Syst. 15(2): 216-226 (2007)
	2006
46		Lee Lerner, Charles E. Stroud: An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs. ESA 2006: 176-182
45		Daniel T. Milton, Sachin Dhingra, Charles E. Stroud: Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs. ESA 2006: 87-93
44		Charles E. Stroud, Dayu Yang, Foster F. Dai: Analog frequency response measurement in mixed-signal systems. ISCAS 2006
43		Foster F. Dai, Charles E. Stroud, Dayu Yang: Automatic linearity and frequency response tests with built-in pattern generator and analyzer. IEEE Trans. VLSI Syst. 14(6): 561-572 (2006)
42		Jack Smith, Tian Xia, Charles E. Stroud: An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. J. Electronic Testing 22(3): 239-253 (2006)
	2005
41		Charles E. Stroud, Srinivas M. Garimella, John Sunwoo: On-Chip BIST-Based Diagnosis of Embedded Programmable Logic Cores in System-on-Chip Devices. Computers and Their Applications 2005: 308-313
40		Srinivas M. Garimella, Charles E. Stroud: Built-In Self-Test and Diagnosis of Multiple Embedded Cores in SoCs. ESA 2005: 130-136
39		Dayu Yang, Foster F. Dai, Charles E. Stroud: Built-in self-test for automatic analog frequency response measurement. ISCAS (3) 2005: 2208-2211
	2004
38		Foster F. Dai, Charles E. Stroud, Dayu Yang, Shuying Qi: Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer. ITC 2004: 271-280
37		Charles E. Stroud, John Sunwoo, Srinivas M. Garimella, Jonathan Harris: Built-In Self-Test for System-on-Chip: A Case Study. ITC 2004: 837-846
36		Miron Abramovici, Charles E. Stroud, John M. Emmert: Online BIST and BIST-based diagnosis of FPGA logic blocks. IEEE Trans. VLSI Syst. 12(12): 1284-1294 (2004)
	2003
35		Charles E. Stroud, Keshia N. Leach, Thomas A. Slaughter: BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study. ITC 2003: 1258-1267
34		Miron Abramovici, Charles E. Stroud: BIST-Based Delay-Fault Testing in FPGAs. J. Electronic Testing 19(5): 549-558 (2003)
	2002
33		Miron Abramovici, Charles E. Stroud, Marty Emmert: Using embedded FPGAs for SoC yield improvement. DAC 2002: 713-724
32		Miron Abramovici, Charles E. Stroud: BIST-Based Delay-Fault Testing in FPGAs. IOLTW 2002: 131-134
31		Charles E. Stroud, Jeremy Nall, Matthew Lashinsky, Miron Abramovici: BIST-Based Diagnosis of FPGA Interconnect. ITC 2002: 618-627
	2001
30		John M. Emmert, Stanley Baumgart, Pankaj Kataria, Andrew M. Taylor, Charles E. Stroud, Miron Abramovici: On-Line Fault Tolerance for FPGA Interconnect with Roving STARs. DFT 2001: 445-454
29		Miron Abramovici, John M. Emmert, Charles E. Stroud: Roving Stars: An Integrated Approach To On-Line Testing, Diagnosis, And Fault Tolerance For Fpgas In Adaptive Computing Systems. Evolvable Hardware 2001: 73-92
28		Miron Abramovici, Charles E. Stroud, Matthew Lashinsky, Jeremy Nall, John M. Emmert: On-Line BIST and Diagnosis of FPGA Interconnect Using Roving STARs. IOLTW 2001: 27-33
27		Henry Chang, Steve Dollens, Gordon Roberts, Charles E. Stroud, Mani Soma, Jacob A. Abraham: Analog and Mixed Signal Benchmark Circuit Development: Who Needs Them? VTS 2001: 415-416
26		Miron Abramovici, Charles E. Stroud: BIST-based test and diagnosis of FPGA logic blocks. IEEE Trans. VLSI Syst. 9(1): 159-172 (2001)
	2000
25		John M. Emmert, Charles E. Stroud, Brandon Skaggs, Miron Abramovici: Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration. FCCM 2000: 165-174
24		John M. Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici: Performance Penalty for Fault Tolerance in Roving STARs. FPL 2000: 545-554
23		Miron Abramovici, Charles E. Stroud, Brandon Skaggs, John M. Emmert: Improving On-Line BIST-Based Diagnosis for Roving STARs. IOLTW 2000: 31-39
22		Charles E. Stroud, John M. Emmert, John R. Bailey, Khushru S. Chhor, Dragan Nikolic: Bridging fault extraction from physical design data for manufacturing test development. ITC 2000: 760-769
21		Miron Abramovici, Charles E. Stroud: DIST-based detection and diagnosis of multiple faults in FPGAs. ITC 2000: 785-794
20		Charles E. Stroud, James R. Bailey, Johan R. Emmert: A New Method for Testing Re-Programmable PLAs. J. Electronic Testing 16(6): 635-640 (2000)
	1999
19		Miron Abramovici, Charles E. Stroud, Carter Hamilton, Sajitha Wijesuriya, Vinay Verma: Using roving STARs for on-line testing and diagnosis of FPGAs in fault-tolerant applications. ITC 1999: 973-982
18		Carter Hamilton, Gretchen Gibson, Sajitha Wijesuriya, Charles E. Stroud: Enhanced Bist-Based Diagnosis of FPGAs via Boundary Scan Access. VTS 1999: 413-419
	1998
17		Charles E. Stroud, Sajitha Wijesuriya, Carter Hamilton, Miron Abramovici: Built-in self-test of FPGA interconnect. ITC 1998: 404-411
16		Charles E. Stroud, Joe K. Tannehill Jr.: Applying Built-In Self-Test to Majority Voting Fault Tolerant Circuits. VTS 1998: 303-308
	1997
15		Charles E. Stroud, M. Ding, S. Seshadri, Ramesh Karri, I. Kim, S. Roy, S. Wu: A Parameterized VHDL Library for On-Line Testing. ITC 1997: 479-488
14		Charles E. Stroud, Eric Lee, Miron Abramovici: BIST-Based Diagnostics of FPGA Logic Blocks. ITC 1997: 539-547
	1996
13		Charles E. Stroud, Ping Chen, Srinivasa Konala, Miron Abramovici: Evaluation of FPGA Resources for Built-In Self-Test of Programmable Logic Blocks. FPGA 1996: 107-113
12		Charles E. Stroud, Eric Lee, Srinivasa Konala, Miron Abramovici: Using ILA Testing for BIST in FPGAs. ITC 1996: 68-75
11		Charles E. Stroud, Srinivasa Konala, Ping Chen, Miron Abramovici: Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!). VTS 1996: 387-392
	1995
10		T. Raju Damarla, Wei Su, Gerald T. Michael, Moon J. Chung, Charles E. Stroud: A built-in self test scheme for VLSI. ASP-DAC 1995
9		Charles E. Stroud, T. Raju Damarla: Improving the efficiency of error identification via signature analysis. VTS 1995: 244-249
8		T. Raju Damarla, Charles E. Stroud, Avinash Sathaye: Multiple error detection and identification via signature analysis. J. Electronic Testing 7(3): 193-207 (1995)
	1994
7		Charles E. Stroud: Reliability of majority voting based VLSI fault-tolerant circuits. IEEE Trans. VLSI Syst. 2(4): 516-521 (1994)
	1993
6		Charles E. Stroud, Ahmed E. Barbour: Testability and test generation for majority voting fault-tolerant circuits. J. Electronic Testing 4(3): 201-214 (1993)
	1991
5		Charles E. Stroud: Distractions in Design for Testability and Built-Is Self-Test. ITC 1991: 1112
4		Charles E. Stroud: Built-In Self-Test for High-Speed Data-Path Circuitry. ITC 1991: 47-56
	1990
3		Charles E. Stroud, Ahmed E. Barbour: Parallel Processing and Hardware Acceleration for Synthesis of VLSI Devices from Behavioral Models. ICPP (1) 1990: 470-473
	1989
2		Charles E. Stroud, Ahmed E. Barbour: Design for Testability and Test Generation for Static Redundancy System Level Fault-Tolerant Circuits. ITC 1989: 812-818
	1988
1		Charles E. Stroud: An Automated BIST Approach for General Sequential Logic Synthesis. DAC 1988: 3-8

Coauthor Index

1	Jacob A. Abraham	[27]
2	Miron Abramovici	[11] [12] [13] [14] [17] [19] [21] [23] [24] [25] [26] [28] [29] [30] [31] [32] [33] [34] [36] [47]
3	Mustafa Ali	[51]
4	James R. Bailey	[20]
5	John R. Bailey	[22]
6	Ahmed E. Barbour	[2] [3] [6]
7	Stanley Baumgart	[30]
8	Henry Chang	[27]
9	Richard Chapman	[50]
10	Jason A. Cheatham	[24]
11	Ping Chen	[11] [13]
12	Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng)	[49]
13	Khushru S. Chhor	[22]
14	Moon J. Chung	[10]
15	Foster F. Dai	[38] [39] [43] [44] [48]
16	T. Raju Damarla	[8] [9] [10]
17	Sachin Dhingra	[45]
18	M. Ding	[15]
19	Steve Dollens	[27]
20	Bradley F. Dutton	[51] [52] [54]
21	Johan R. Emmert	[20]
22	John M. Emmert	[22] [23] [24] [25] [28] [29] [30] [36] [47]
23	Marty Emmert	[33]
24	Srinivas M. Garimella	[37] [40] [41]
25	Brooks R. Garrison	[53]
26	Gretchen Gibson	[18]
27	Carter Hamilton	[17] [18] [19]
28	Jonathan Harris	[37]
29	Ramesh Karri	[15]
30	Pankaj Kataria	[24] [30]
31	I. Kim	[15]
32	John Klingelhoeffer	[50]
33	Srinivasa Konala	[11] [12] [13]
34	Matthew Lashinsky	[28] [31]
35	Keshia N. Leach	[35]
36	Eric Lee	[12] [14]
37	Lee Lerner	[46]
38	Gerald T. Michael	[10]
39	Daniel T. Milton	[45] [53]
40	Jeremy Nall	[28] [31]
41	Victor Nelson	[50]
42	Dragan Nikolic	[22]
43	Shuying Qi	[38]
44	Jie Qin	[48]
45	Lloyd Riggs	[50]
46	Gordon Roberts	[27]
47	S. Roy	[15]
48	Avinash Sathaye	[8]
49	S. Seshadri	[15]
50	Brandon Skaggs	[23] [25]
51	Thomas A. Slaughter	[35]
52	Jack Smith	[42]
53	Mani Soma	[27]
54	George Starr	[50]
55	Wei Su	[10]
56	John Sunwoo	[37] [41] [51]
57	Joe K. Tannehill Jr.	[16]
58	Andrew M. Taylor	[24] [30]
59	Vinay Verma	[19]
60	Laung-Terng Wang	[49]
61	J. M. Wersinger	[50]
62	Sajitha Wijesuriya	[17] [18] [19]
63	S. Wu	[15]
64	Tian Xia	[42]
65	Dayu Yang	[38] [39] [43] [44]

Colors in the list of coauthors