 | 1997 |
| 28 |  | Stephen Y. H. Su,
Rong Yao:
Fault-Tolerant Array Processors Via Reconfiguration of Two-Level Redundancy Arrays.
PDPTA 1997: 1633-1642 |
| 1991 |
| 27 |  | Stephen Y. H. Su,
Michal Cutler,
Mingshien Wang:
Self-Diagnosis of Faelures in VLSI Tree Array Processors.
IEEE Trans. Computers 40(11): 1252-1257 (1991) |
| 1989 |
| 26 |  | Mingshien Wang,
Michal Cutler,
Stephen Y. H. Su:
Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy.
IEEE Trans. Computers 38(4): 547-554 (1989) |
| 1988 |
| 25 |  | Stephen Y. H. Su,
Hede Ma:
Fault Isolation in Grey Systems.
ITC 1988: 54-63 |
| 24 |  | Stephen Y. H. Su,
Hede Ma:
Designs for Diagnosability and Reliability in VLSI Systems.
ITC 1988: 888-897 |
| 23 |  | Li Shen,
Stephen Y. H. Su:
A Functional Testing Method for Microprocessors.
IEEE Trans. Computers 37(10): 1288-1293 (1988) |
| 1986 |
| 22 |  | Israel Koren,
Zahava Koren,
Stephen Y. H. Su:
Analaysis of a Class of Recovery Procedures.
IEEE Trans. Computers 35(8): 703-712 (1986) |
| 1985 |
| 21 |  | Tonysheng Lin,
Stephen Y. H. Su:
VLSI Functional Test Pattern Generation: A Design and Implementation.
ITC 1985: 922-929 |
| 20 |  | Shiyi Xu,
Stephen Y. H. Su:
Detecting I/O and Internal Feedback Bridging Faults.
IEEE Trans. Computers 34(6): 553-557 (1985) |
| 19 |  | Tonysheng Lin,
Stephen Y. H. Su:
The S-Algorithm: A Promising Solution for Systematic Functional Test Generation.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(3): 250-263 (1985) |
| 1984 |
| 18 |  | Stephen Y. H. Su:
IDAS: an integrated design automation system.
AFIPS National Computer Conference 1984: 143-150 |
| 17 |  | Li Shen,
Stephen Y. H. Su:
VLSI functional testing using critical path traces at hardware description language level.
Fehlertolerierende Rechensysteme 1984: 364-379 |
| 16 |  | Tonysheng Lin,
Stephen Y. H. Su:
Functional Test Generation of Digital LSI/VLSI Systems Using Machine Symbolic Execution Technique.
ITC 1984: 660-668 |
| 1983 |
| 15 |  | Kewal K. Saluja,
Li Shen,
Stephen Y. H. Su:
A Simplified Algorithm for Testing Microprocessors.
ITC 1983: 668-675 |
| 1982 |
| 14 |  | Chi-Chang Liaw,
Stephen Y. H. Su:
A New Fault Model and Testing Technique for CMOS Devices.
ITC 1982: 25-34 |
| 13 |  | Yacoub M. El-Ziq,
Stephen Y. H. Su:
Fault Diagnosis of MOS Combinational Networks.
IEEE Trans. Computers 31(2): 129-139 (1982) |
| 1981 |
| 12 |  | Chi-Chang Liaw,
Stephen Y. H. Su,
Yashwant K. Malaiya:
State Diagram Approach for Functional Testing of Control Section.
ITC 1981: 433-446 |
| 11 |  | Stephen Y. H. Su,
Yu-I Hsieh:
Testing Functional Faults in Digital Systems Described by Register Transfer Language.
ITC 1981: 447-457 |
| 10 |  | Chi-Chang Liaw,
Stephen Y. H. Su,
Yashwant K. Malaiya:
Test-Experiments for Detection and Location of Intermittent Faults in Sequential Circuits.
IEEE Trans. Computers 30(12): 989-995 (1981) |
| 9 |  | Yashwant K. Malaiya,
Stephen Y. H. Su:
Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults.
IEEE Trans. Computers 30(8): 600-604 (1981) |
| 1980 |
| 8 |  | Stephen Y. H. Su,
Edgar DuCasse:
A Hardware Redundancy Reconfiguration Scheme for Tolerating Multiple Module Failures.
IEEE Trans. Computers 29(3): 254-258 (1980) |
| 7 |  | Mark G. Karpovsky,
Stephen Y. H. Su:
Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines.
IEEE Trans. Computers 29(6): 523-527 (1980) |
| 1979 |
| 6 |  | Israel Koren,
Stephen Y. H. Su:
Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults.
IEEE Trans. Computers 28(7): 514-520 (1979) |
| 1978 |
| 5 |  | Yacoub M. El-Ziq,
Stephen Y. H. Su:
Computer-Aided Logic Design of Two-Level MOS Combinational Networks with Statistical Results.
IEEE Trans. Computers 27(10): 911-923 (1978) |
| 4 |  | Stephen Y. H. Su,
Israel Koren,
Yashwant K. Malaiya:
A Continous-Parameter Markov Model and Detection Procedures for Intermittent Faults.
IEEE Trans. Computers 27(6): 567-570 (1978) |
| 1977 |
| 3 |  | Stephen Y. H. Su,
Richard J. Spillman:
An overview of fault-tolerant digital system architecture.
AFIPS National Computer Conference 1977: 19-26 |
| 2 |  | Richard J. Spillman,
Stephen Y. H. Su:
Detection of Single, Stuck-Type Faulures in Multivalued Combinational Networks.
IEEE Trans. Computers 26(12): 1242-1251 (1977) |
| 1976 |
| 1 |  | Melvin A. Breuer,
Shih-Jeh Chang,
Stephen Y. H. Su:
Identification of Multiple Stuck-Type Faults in Combinational Networks.
IEEE Trans. Computers 25(1): 44-54 (1976) |