 | 2009 |
|---|
| 3 |       | Tameesh Suri,
Aneesh Aggarwal:
Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration.
Conf. Computing Frontiers 2009: 151-160 |
| 2 | | Tameesh Suri,
Aneesh Aggarwal:
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration.
VLSI Design 2009: 145-150 |
| 2008 |
|---|
| 1 | | Tameesh Suri,
Aneesh Aggarwal:
Scalable Multi-cores with Improved Per-core Performance Using Off-the-critical Path Reconfigurable Hardware.
HiPC 2008: 365-377 |
